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Committee Date Time Place Paper Title / Authors Abstract Paper #
ICD, SDM 2007-08-23
11:10		 Hokkaido Kitami Institute of Technology Multiphase-Output Level Shift System used in Multiphase PLL for Low Power Application
Akinori Matsumoto, Shiro Sakiyama, Yusuke Tokunaga, Takashi Morie, Shiro Dosho (Matsushita) SDM2007-146 ICD2007-74		 Low power design is essential for mobile application. For a PLL with multiphase outputs, level shifter (LS), which conve... [more] SDM2007-146 ICD2007-74
pp.29-34
ICD, SDM 2006-08-17
17:25		 Hokkaido Hokkaido University An Ultra-Wide Range Digitally Adaptive Control Phase Locked Loop with New 3-Phase Switched Capacitor Loop Filter
Shiro Dosho, Naoshi Yanagisawa, Kazuaki Sogawa, Yuji Yamada, Takashi Morie (Matsushita Indusitrial Co. Ltd.) 		It is an innovative idea for modern PLL generation to control the bandwidth proportionally to a reference frequency. Rec... [more] SDM2006-141 ICD2006-95
pp.93-98
ICD 2006-05-26
13:00		 Hyogo Kobe University A PLL for a DVDx16 Write System with 63 Output Phases and 32ps
Shiro Dosho, Shiro Sakiyama, Noriaki Takeda, Yusuke Tokunaga, Takashi Morie (Matsushita) 		 [more] ICD2006-33
pp.65-70
ICD 2006-05-26
13:30		 Hyogo Kobe University A 0.03mm2 9mW Wide-Range Duty-Cycle-Correcting False-Lock-Free DLL with Fully Balanced Charge-Pump for DDR Interface
Yusuke Tokunaga, Shiro Sakiyama, Shiro Dosho, Yasuyuki Doi (Matsushita Electric), Makoto Hattori (PSCST) 		 [more] ICD2006-34
pp.71-75
ICD, SDM 2005-08-19
08:30		 Hokkaido HAKODATE KOKUSAI HOTEL A -90dBc@10kHz Phase Noise Fractional-N Frequency Synthesizer with Accurate Loop Bandwidth Control Circuit
Shiro Dosho, Takashi Morie, Koji Okamoto, Yuji Yamada, Kazuaki Sogawa (Matsushita Electric Industrial Co., Ltd) 		This paper describes a -90dBc@10kHz phase noise fractional-N frequency synthesizer of 110M-180MHz output with accurate l... [more] SDM2005-143 ICD2005-82
pp.1-6
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