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Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2014-11-28
10:05		 Oita B-ConPlaza Implementation and Evaluation of An Accelerator based on Manymemory Network
Ryo Shimizu, Masakazu Tanomoto, Shinya Takamaeda-Yamazaki, Jun Yao, Yasuhiko Nakashima (NAIST) CPSY2014-81		 In this research, we focus on the data parallelization of stencil computations on a previously proposed memory-network b... [more] CPSY2014-81
pp.51-56
CPSY, DC
(Joint)		 2014-07-28
13:40		 Niigata Toki Messe, Niigata High Performance Graph Processing with a Memory Intensive Array Accelerator
Ryo Shimizu, Shinya Takamaeda Yamazaki, Jun Yao, Yasuhiko Nakashima (NAIST) CPSY2014-11		 A speedup technique incorporating a CGRA equipped with a local memory attached to each execution unit for accelerating t... [more] CPSY2014-11
pp.7-12
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