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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| RECONF | 2014-06-12 13:45 |
Miyagi | Katahira Sakura Hall | A Design of Blokus Player Algorithm with Impulse High-Level Synthesis Tools Ryo Kawai, Tomonori Izumi (Ritsumeikan Univ.)  RECONF2014-9 |
[more] | RECONF2014-9 pp.43-47 |
| IPSJ-SLDM, CPSY, RECONF, VLD [detail] | 2014-01-28 09:45 |
Kanagawa | Hiyoshi Campus, Keio University | a discussion on hardware architecture of SIFT algorithm for FPGAs utilizing a high-level synthesis tool Naohisa Arakawa, Lin Meng, Tomonori Izumi (Ritsumeikan Univ.) VLD2013-105 CPSY2013-76 RECONF2013-59 |
[more] | VLD2013-105 CPSY2013-76 RECONF2013-59 pp.19-24 |
| VLD | 2013-03-06 11:20 |
Okinawa | Okinawa Seinen Kaikan | a design of COMET II processor as an embedded softcore processor Kei Kimoto, Tomonori Izumi (Ritsumeikan Univ.) VLD2012-156 |
[more] | VLD2012-156 pp.111-116 |
| SP | 2013-01-30 15:15 |
Kyoto | Doshisha Univ. | Speaker Recognition Using Formant of Vowels Naoyuki Urakami, Yuta Shoji, Jun Shiraishi, Hironori Yamauchi, Yohei Fukumizu, Tomonori Izumi (Ritsumeikan Univ) SP2012-101 |
In this paper we propose a speaker recognition or verification methods based on formant of vowels. The proposed method i... [more] | SP2012-101 pp.19-24 |
| CPSY, VLD, RECONF, IPSJ-SLDM [detail] | 2013-01-17 13:00 |
Kanagawa | A design of a line buffer module for image proccessing as a library of a high-level synthesis environment Naohisa Arakawa, Tomonori Izumi (Ritsumeikan Univ.) VLD2012-129 CPSY2012-78 RECONF2012-83 |
[more] | VLD2012-129 CPSY2012-78 RECONF2012-83 pp.129-134 |
|
| RECONF | 2012-05-29 15:35 |
Okinawa | Tiruru (Naha Okinawa, Japan) | a design of an interconnection system of modules and a control unit of reconfiguration for embedded systems utilizing dynamic reconfiguration Tomokazu Mizuno, Yoshiaki Kida, Ryo Kamide, Shin Terada, Mitsuyoshi Tokuda, Tomonori Izumi (Ritsumeikan Univ.) RECONF2012-12 |
[more] | RECONF2012-12 pp.67-70 |
| RECONF | 2012-05-30 11:50 |
Okinawa | Tiruru (Naha Okinawa, Japan) | A Hardware Implementation and an FPGA Prototyping of a Connect-6 Player Algorithm Using Impulse-C Naohisa Arakawa, Tomonori Izumi (Ritsumeikan Univ.) RECONF2012-23 |
[more] | RECONF2012-23 pp.131-136 |
| RECONF, VLD, CPSY, IPSJ-SLDM [detail] | 2011-01-18 10:00 |
Kanagawa | Keio Univ (Hiyoshi Campus) | A Fundamental Design of a Prototyping Environment to Apply Reconfigurable Logic Devices to Autonomous Recognition and Control Systems Tomonori Izumi (Ritsumeikan Univ.) VLD2010-101 CPSY2010-56 RECONF2010-70 |
Reconfigurable logic devices are expected to be key devices to implement real-time, low-power, small autonomous recognit... [more] | VLD2010-101 CPSY2010-56 RECONF2010-70 pp.123-126 |
| VLD, ICD | 2008-03-07 14:40 |
Okinawa | TiRuRu | Implementation and Evaluation of Network Security using An Embedded Programmable Logic Matrix (ePLX) Mitsutaka Matsumoto, Shun Kimura (Ritsumeikan Univ.), Hirofumi Nakano, Takenobu Iwao, Yoshihiro Okuno, Kazutami Arimoto (Renesas Technology Corp.), Tomonori Izumi, Takeshi Fujino (Ritsumeikan Univ.) VLD2007-165 ICD2007-188 |
Low Cost Network Appliance with low power microprocessor must be connected with networks in order to realize ubiquitous ... [more] | VLD2007-165 ICD2007-188 pp.53-58 |
| VLD, CPSY, RECONF, DC, IPSJ-SLDM, IPSJ-ARC (Joint) [detail] |
2007-11-20 15:10 |
Fukuoka | Kitakyushu International Conference Center | A Development of the Auto mapping tool for embedded Programmable Logic matriX (ePLX) and the study of ePLX local architecture Kouta Ishibashi, Yoshiyuki Tanaka, Mitsutaka Matsumoto (Ritsumeikan Univ.), Hirofumi Nakano, Takenobu Iwao, Yoshihiro Okuno, Kazutami Arimoto (Renesas Technology), Masaya Yoshikawa (Meijo Univ.), Tomonori Izumi, Takeshi Fujino (Ritsumeikan Univ.) RECONF2007-32 |
We propose a ePLX(embedded Programmable Logic matriX)which will be embedded in SoC.The ePLX consists of small area and a... [more] | RECONF2007-32 pp.1-6 |
| RECONF | 2007-05-17 17:20 |
Ishikawa | Kanazawa Bunka Hall | A Discussion on a Router for embedded Programmable Logic matriX (ePLX) Naoki Okuno, Tomonori Izumi, Takeshi Fujino (Ritsumeikan Univ.), Takenobu Iwao, Hirofumi Nakano, Yoshihiro Okuno, Kazutami Arimoto (Renesas) RECONF2007-9 |
We propose a fine-grained programmable logic architecture designed to be embedded in system-on-chips (SoCs) to enhance t... [more] | RECONF2007-9 pp.49-54 |
| VLD, IPSJ-SLDM | 2007-05-10 16:00 |
Kyoto | Kyodai Kaikan | [Panel Discussion]
Highlevel synthesis; will it be useful or useless? Masahiro Fukui (Ritsumeikan Univ.), Nagisa Ishiura (Kwansei Gakuin Univ.), Tomonori Izumi (Ritsumeikan Univ.), Akihisa Yamada (SHARP) VLD2007-6 |
As to utilizing high-level synthesis tools effectively, we plan to discuss from the views of LSI designers, high-level s... [more] | VLD2007-6 p.31 |
| ICD, VLD | 2007-03-08 09:50 |
Okinawa | Mielparque Okinawa | An efficient design methodology for image processing digital system by using a high level hardware description language Satoru Inoue, Taiki Hashizume, Tomonori Izumi, Masahiro Fukui (Ritsumeikan Univ.) |
Higher abstraction design has been highly required so that a human can focus on intelligent part of design by making com... [more] | VLD2006-123 ICD2006-214 pp.25-30 |
| VLD, CPSY, RECONF, IPSJ-SLDM | 2007-01-18 13:25 |
Tokyo | Keio Univ. Hiyoshi Campus | Analysis of design architecture of ePLX ( embedded Programmable Logic matriX) and Evaluation of circuit mapping Tomoo Hishida, Kouta Ishibashi, Shun Kimura, Naoki Okuno, Mitsutaka Matsumoto (Ritsumeikan Univ.), Hirofumi Nakano, Takenobu Iwao, Yoshihiro Okuno, Kazutami Arimoto (Renesas Technology), Tomonori Izumi, Takeshi Fujino (Ritsumeikan Univ.) |
Recently, non-recurring engineering costs (NREs), including cost of mask-sets, and engineering design efforts are critic... [more] | VLD2006-100 CPSY2006-71 RECONF2006-71 pp.37-42 |
| IE, ITE-BCT, ITE-AIT, ITE-ME | 2006-11-30 15:10 |
Fukuoka | Proposal of JPEG 2000 dynamic rate control method in real-time video derivery system under narrowband Yuki Matsumoto, Tomonori Izumi, Hironori Yamauchi (Ritsumeikan Univ.) |
[more] | IE2006-99 pp.19-24 |
|
| ICD, SIP, IE, IPSJ-SLDM | 2006-10-26 10:00 |
Miyagi | Design of Embedded System for Micro-Capsule-Robot Tsutomu Nishimura, Masatsugu Kobayashi, Takehiro Yoshida, Manabu Takeishi, Tomonori Izumi (Ritsumeikan Univ.), Toshiyuki Katou (Cadence Design Systems Japan Corp.), Hironori Yamauchi (Ritsumeikan Univ.) |
[more] | SIP2006-86 ICD2006-112 IE2006-64 pp.17-22 |
|
| ICD, SIP, IE, IPSJ-SLDM | 2006-10-26 10:20 |
Miyagi | Construction and Design of the Communication Module for Micro-Capsule-Robots Kenichi Watanabe, Fumiya Nakamura, Minoru Saito, Takafumi Kado, Notsugu Yamamura, Tomonori Izumi, Hironori Yamauchi (Ritsumeikan Univ.) |
We develop a computer platform as a central system of a micro-capsule-robot, which moves freely inside a body, and gets ... [more] | SIP2006-87 ICD2006-113 IE2006-65 pp.23-28 |
|
| RECONF | 2006-05-19 14:15 |
Miyagi | TOHOKU UNIVERSITY | An FPGA Implementation of 200Mbps CI/OFDM Tranceiver Tomonori Izumi (Ritsumeikan Univ.), Minoru Okada (NAIST), Yosuke Yamahara, Yuki Matsumoto, Takayuki Nakatani, Naoto Umehara, Shoichiro Namba, Masahiro Funatsuki, Minoru Sakaida (Ritsumeikan Univ.), Toshihiro Masaki (Osaka Univ.) |
[more] | RECONF2006-16 pp.31-36 |
| RECONF | 2006-05-19 14:45 |
Miyagi | TOHOKU UNIVERSITY | An FPGA Implementation of digital modulator of High-Speed CI/OFDM Tranceiver Naoto Umehara, Yuki Matsumoto, Takayuki Nakatani, Tomonori Izumi (Ritsumeikan Univ.), Minoru Okada (NAIST), Toshihiro Masaki (Osaka Univ.) |
[more] | RECONF2006-17 pp.37-42 |
| RECONF | 2006-05-19 15:15 |
Miyagi | TOHOKU UNIVERSITY | An FPGA Implementation of Digital Synchronizers of High-Speed CI/OFDM Tranceiver Takayuki Nakatani, Shoichiro Namba, Masahiro Funatsuki, Tomonori Izumi (Ritsumeikan Univ.), Minoru Okada (NAIST), Toshihiro Masaki (Osaka Univ.) |
[more] | RECONF2006-18 pp.43-48 |
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