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Committee Date Time Place Paper Title / Authors Abstract Paper #
IPSJ-SLDM, CPSY, RECONF, VLD [detail] 2014-01-29
10:50		 Kanagawa Hiyoshi Campus, Keio University A configurable switch mechanism for random NoCs
Seiichi Tade, Takahiro Kagami, Ryuta Kawano, Hiroki Matsutani (Keio Univ.), Michihiro Koibuchi (NII), Hideharu Amano (Keio Univ.) VLD2013-123 CPSY2013-94 RECONF2013-77		 A practical method for making use of the small world phenomenon to increase Network-on-Chips (NoCs)
is proposed. Recent... [more]		 VLD2013-123 CPSY2013-94 RECONF2013-77
pp.125-130
DC, CPSY 2013-04-26
17:05		 Tokyo   A low latency topology for NoC using multiple host links
Ryuta Kawano (Keio Univ.), Ikki Fujiwara (NII), Hiroki Matsutani, Hideharu Amano (Keio Univ.), Michihiro Koibuchi (NII) CPSY2013-9 DC2013-9		 In recent many-core architectures, the number of cores has been steadily increasing. Therefore, network latency between ... [more] CPSY2013-9 DC2013-9
pp.49-54
CPSY, VLD, RECONF, IPSJ-SLDM [detail] 2013-01-17
11:25		 Kanagawa   Low latency network topology using multiple links at each host
Ryuta Kawano (Keio Univ.), Ikki Fujiwara (NII), Hiroki Matsutani, Hideharu Amano (Keio Univ.), Michihiro Koibuchi (NII) VLD2012-128 CPSY2012-77 RECONF2012-82		 End-to-end network latency has become an important issue for parallel application on large-scale High Performance Comput... [more] VLD2012-128 CPSY2012-77 RECONF2012-82
pp.123-128
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