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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
KBSE 2011-03-10
15:55
Oita Beppu International Convention Center A Method to Analyze Failure Scenarios of Embedded Systems by Using Unexpected Phenomena
Toshiro Mise, Yasufumi Shinyashiki (Panasonic Electric Works), Keiichi Katamine, Masaaki Hashimoto (Kyusyu Inst. of Tech), Takako Nakatani (University of Tsukuba), Naoyasu Ubayashi (Kyushu University) KBSE2010-50
This paper describes an analysis matrix and its method for extracting failure scenarios named ESIM (Embedded System Impr... [more] KBSE2010-50
pp.19-24
KBSE 2009-09-15
14:40
Overseas Hanoi University of Technology, Hanoi, Vietnam Formalization of Analysis Method of Unexpected Obstacles in Embedded Systems from the viewpoint of Qualitative Reasoning
Keiichi Katamine (Kyushu Inst. of Tech.), Yasufumi Shinyashiki, Toshiro Mise (Panasonic Electric Works Co., Ltd.), Takako Nakatani (Univ. of Tsukuba.), Naoyasu Ubayashi, Masaaki Hashimoto (Kyushu Inst. of Tech.) KBSE2009-27
This paper proposes a formalization for an analysis method of extracting unexpected obstacles in order to improve the qu... [more] KBSE2009-27
pp.57-62
KBSE 2008-11-27
10:30
Fukuoka FIT A Discussion on QFD and Guide-Words in Analysis of Unexpected Obstacles in Embedded Systems
Junya Kubo, Tomio Inoue (Kyusyu Institute of Technology), Tosiro Mise, Yasufumi Shinyashiki (PEW/KIT), Masaaki Hashimoto, Keiichi Katamine, Naoyasu Ubayashi (Kyusyu Institute of Technology), Takako Nakatani (Tsukuba Univ./S-Lagoon) KBSE2008-23
 [more] KBSE2008-23
pp.1-6
KBSE 2008-11-27
11:10
Fukuoka FIT Formalization for Integrating Information Flow Diagram and Analysis Matrix to Analyze Unexpected Obstacles in Embedded Systems
Tomio Inoue (Kyushu Institute of Technology), Toshiro Mise (Panasonic Electric Works Co., Ltd), Yasufumi Shinyashiki, Masaaki Hashimoto, Keiichi Katamine, Naoyasu Ubayashi (Kyushu Institute of Technology), Takako Nakatani (Tsukuba Univ.) KBSE2008-24
We can treat embedded systems as two aspects about unexpected obstacles such as the failure. One is a static side using ... [more] KBSE2008-24
pp.7-12
SS 2006-02-02
13:30
Fukuoka Fukuoka Laboratory for Emerging and Enabling Technology of SoC An analysis method of unexpected obstacles in embedded software by Information Flow Diagram
Hidehiro Kametani (KIT), Yasufumi Shinyashiki, Toshiro Mise (MEW), Masaaki Hashimoto, Naoyasu Ubayashi, Keiichi Katamine (KIT), Takako Nakatani (S-Lagoon)
This paper proposes an analysis method of unexpected obstacles in embedded software by using diagrams on which informati... [more] SS2005-76
pp.1-6
KBSE 2004-11-18
15:00
Kagoshima Kagoshima Univ. An Analysis of Information Flow Graph based on Conceptual Model of Exceptions in Embedded Software
Hisanori Hatanaka (K.I.T.), Yasufumi Shinyashiki (Matsushita Electric Works, Co., Ltd. / K.I.T.), Toshiro Mise (Matsushita Electric Works System Solution, Co., Ltd. / K.I.T.), Hidehiro Kametani, Masaaki Hashimoto, Naoyasu Ubayashi, Keiichi Katamine (K.I.T.), Takako Nakatani (K.I.T / S-Lagoon Co., Ltd.)
 [more] KBSE2004-18
pp.19-24
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