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Committee Date Time Place Paper Title / Authors Abstract Paper #
RECONF 2011-09-27
13:20		 Aichi Nagoya Univ. Design and Implementation of Adaptive Viterbi Decoder using Dynamic Reconfigurable System STP Engine
Yuken Kishimoto, Takao Toi, Takaaki Miyajima, Hideharu Amano (Keio Univ.) RECONF2011-38		 Implementing Viterbi Algorithm that is the decoding method of Convolutional code on hard-wired logic, in order to variou... [more] RECONF2011-38
pp.93-98
RECONF 2008-05-23
15:15		 Fukushima The University of Aizu Design and Implementation of Viterbi Decoder for Multi-Constraint Length Using Reconfigurable Processor
Yuken Kishimoto, Shinichiro Haruyama, Masao Nakagawa, Hideharu Amano (Keio Univ.) RECONF2008-22		  [more] RECONF2008-22
pp.125-130
RCS, MoNA, WBS, SR, MW
(Joint)		 2007-03-09
09:20		 Kanagawa YRP Adaptive Reduction of Power Consumption of Viterbi Decoder using Reconfigurable Processor
Yuken Kishimoto, Shinichiro Haruyama, Masao Nakagawa (Keio Univ.) SR2006-90		 In past time, the research that Viterbi decoder is achieved on VLSI was studied, but it was unique research that Viterbi... [more] SR2006-90
pp.9-13
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