| IEICE Technical Committee Submission System Conference Schedule |
Online Proceedings [Sign in] Tech. Rep. Archives |
All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| ISEC | 2010-12-15 13:50 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | The Mutual Information Analysis using a classification technique of combination Kuniji Wakabayashi, Keisuke Iwai, Takakazu Kurokawa (NDA)  ISEC2010-67 |
Against Side channel Attack Standard Evaluation BOard(SASEBO) implemented the AES encryption as hardware circuit, carr... [more] | ISEC2010-67 pp.13-18 |
| ISEC | 2010-12-15 14:15 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Logarithmic model based CPA with low pass filter Atsunori Sakurai, Keisuke Iwai, Takakazu Kurokawa (NDA) ISEC2010-68 |
Depending on an implementation method of AES, I show that it comes off from the linear nature when I classified consumpt... [more] | ISEC2010-68 pp.19-24 |
| IT, ISEC, WBS | 2010-03-05 09:25 |
Nagano | Nagano-Engineering Campus, Shinshu University | Countermeasures against Power Analysis Attacks in Assembly code Kazunori Kawamura, Keisuke Iwai, Takakazu Kurokawa (NDA) IT2009-103 ISEC2009-111 WBS2009-82 |
Countermeasures for AES software implementation against power analysis attacks are proposed in this paper. Intermediate ... [more] | IT2009-103 ISEC2009-111 WBS2009-82 pp.205-210 |
| IT, ISEC, WBS | 2010-03-05 09:50 |
Nagano | Nagano-Engineering Campus, Shinshu University | Electromagnetic Analysis from power line on SASEBO-R Tetsutaro Kanno, Keisuke Iwai, Takakazu Kurokawa (NDA) IT2009-104 ISEC2009-112 WBS2009-83 |
The EM-analysis, one of the Side Channel attacks, has advantage for the freedom of the measuring point, espacially it is... [more] | IT2009-104 ISEC2009-112 WBS2009-83 pp.211-216 |
| IPSJ-SLDM, VLD, CPSY, RECONF [detail] | 2010-01-27 10:00 |
Kanagawa | Keio Univ (Hiyoshi Campus) | Granularity Optimization Method for AES Encryption Implementation on CUDA Naoki Nishikawa, Keisuke Iwai, Takakazu Kurokawa (NDA) VLD2009-86 CPSY2009-68 RECONF2009-71 |
GPGPU as parallel computation platform has been noticed from almost all reseach fields. In particular CUDA occupie... [more] | VLD2009-86 CPSY2009-68 RECONF2009-71 pp.107-112 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2009-12-03 16:00 |
Kochi | Kochi City Culture-Plaza | Evaluation of CryptMT steam cipher implemented on FPGA Naoko Yamada (Keio Univ.), Atsunori Sakurai, Keisuke Iwai, Takakazu Kurokawa (National Defense Academy), Hideharu Amano (Keio Univ.) RECONF2009-47 |
A new streaming encryption scheme: CryptMT which applied to the next generation European encryption competition eSTREAM ... [more] | RECONF2009-47 pp.37-42 |
| CPSY, DC (Joint) |
2009-08-04 - 2009-08-05 |
Miyagi | Acceleration of the key crack against cipher algorithm using CUDA Naoki Nishikawa, Keisuke Iwai, Takakazu Kurokawa (National Defense Academy of Japan) CPSY2009-18 |
Recently, high performance computing using GPU has recognized. GPU has good cost-performance ratio, and exhibit the capa... [more] | CPSY2009-18 pp.49-54 |
|
| ISEC | 2008-12-17 15:45 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Construction of the experiment environment for the CPA attack Daisaku Minamizaki, Keisuke Iwai, Takakazu Kurokawa (NDA) ISEC2008-99 |
SASEBO(Side-channel Attack Standard Evaluation BOard) was developed with the aim of integrating at establishment of the ... [more] | ISEC2008-99 pp.61-66 |
| ISEC | 2008-05-16 09:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Verification of a side-channel attack to an AES circuit on SASEBO Daisaku Minamizaki, Keisuke Iwai, Takakazu Kurokawa (NDA) ISEC2008-1 |
Recently, the research on the side-channel attack is actively done, and SASEBO board that conformed to the INSTAC32 was ... [more] | ISEC2008-1 pp.1-8 |
| ISEC | 2008-05-16 09:55 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | An implementation of an automatic analyzer for side channel attacks Keisuke Iwai, Daisaku Minamizaki, Takakazu Kurokawa (NDA) ISEC2008-2 |
Recently, environments for experiments of side-channel attacks are being developed. On the other hand, there is not enou... [more] | ISEC2008-2 pp.9-14 |
| ISEC | 2007-12-19 09:55 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Verification of DPA against XOR in hardware implementation of AES Yohei Tsuji, Keisuke Iwai, Takakazu Kurokawa (NDA) ISEC2007-113 |
DPA techniques against cryptographic devices based on hardware implementation utilize the transition probability of bit ... [more] | ISEC2007-113 pp.5-10 |
| RECONF, CPSY, VLD, DC, IPSJ-SLDM, IPSJ-ARC (Joint) [detail] |
2006-11-30 09:25 |
Fukuoka | Kitakyushu International Conference Center | A Design of AES S-BOX circuit for DPA countermeasure Minoru Sasaki, Keisuke Iwai, Takakazu Kurokawa (NDA.) |
[more] | RECONF2006-44 pp.1-6 |
| ISEC | 2006-09-13 11:35 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Verification of MRSL based S-BOX in AES as a countermeasure against DPA. Minoru Sasaki, Keisuke Iwai, Takakazu Kurokawa (NDA.) |
The composing method of S-BOX in AES using composite fields is effective to implement compact cryptosystem, since the ci... [more] | ISEC2006-77 pp.37-44 |
| RECONF | 2005-12-01 15:25 |
Fukuoka | Kitakyushu International Conference Center | FPGA implementation of H.264/AVC encoder using soft processor core Yutaka Okamoto, Keisuke Iwai, Takakazu Kurokawa (NDA) |
[more] | RECONF2005-69 pp.61-66 |
[Return to Top Page]