IEICE Technical Committee Submission System
Conference Schedule		 Online Proceedings
[Sign in]
Tech. Rep. Archives
    [Japanese] / [English] 
( Committee/Place/Topics  ) --Press->
 
( Paper Keywords:  /  Column:Title Auth. Affi. Abst. Keyword ) --Press->

All Technical Committee Conferences  (Searched in: All Years)

Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 5 of 5  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
OPE, LQE, OCS 2012-10-26
13:30		 Miyazaki   Field evaluation of PDL penalty of 100 Gb/s PDM-QPSK signals using installed fiber with a large DGD
Ayako Iwaki, Takeshi Kawai, Yohei Sakamaki, Shuto Yamamoto, Tetsuro Inui, Hiroto Kawakami, Shogo Yamanaka, Takashi Ono, Kunihiko Mori, Masahiro Suzuki, Tomoyoshi Kataoka, Mitsunori Fukutoku, Toshikazu Sakano, Masahito Tomizawa, Yutaka Miyamoto (NTT) OCS2012-67 OPE2012-118 LQE2012-84		 Transmission penalty caused by PDL affects 100 Gb/s PDM-QPSK signals as the combined effects of DGD and PDL. We reported... [more] OCS2012-67 OPE2012-118 LQE2012-84
pp.135-140
NS, OCS, PN
(Joint)		 2012-06-21
13:30		 Yamagata Yamagata Univ. 40G/100G Mixed-Rate PDM-QPSK Real-Time DWDM Transmission in Field Testbed Using Commercially-Available Installed Fibers
Shuto Yamamoto, Tetsuro Inui, Hiroto Kawakami, Shogo Yamanaka, Toshikazu Sakano, Takeshi Kawai, Takashi Ono, Ayako Iwaki, Tadao Nakagawa (NTT), Takashi Kotanigawa (NTT Com) OCS2012-9		 We demonstrate 40-G and 100-G mixed-rate PDM-QPSK DWDM transmission using real-time DSP in 580-km field testbed consisti... [more] OCS2012-9
pp.1-6
MW, ED 2011-01-13
16:05		 Tokyo Kikai-Shinko-Kaikan Bldg. A High-Speed Digital-to-Analog Converter with InP HBT Technology for Multi-Level Optical Transmission Systems
Munehiko Nagatani, Hideyuki Nosaka, Shogo Yamanaka, Kimikazu Sano, Koichi Murata (NTT) ED2010-180 MW2010-140		 High-order multi-level modulation formats, such as 16-QAM and 64-QAM, are promising techniques for constructing beyond-1... [more] ED2010-180 MW2010-140
pp.29-33
ED, MW 2010-01-15
09:55		 Tokyo Kikai-Shinko-Kaikan Bldg A 32-GS/s 6-bit Double-Sampling DAC in InP HBT Technology
Munehiko Nagatani, Hideyuki Nosaka, Shogo Yamanaka, Kimikazu Sano, Koichi Murata (NTT Corp.) ED2009-191 MW2009-174		 We have developed an ultrahigh-speed 6-bit DAC with InP HBT Technology. To achieve ultrahigh-speed operation, we devised... [more] ED2009-191 MW2009-174
pp.93-97
ED, MW 2010-01-15
10:20		 Tokyo Kikai-Shinko-Kaikan Bldg Pseudo Sinusoidal Generator with PVT Compensation Circuit using InP HBTs -- For Linear Control of Vector-Sum Phase Shifter --
Hideyuki Nosaka, Munehiko Nagatani, Shogo Yamanaka, Kimikazu Sano, Koichi Murata (NTT Corp.) ED2009-192 MW2009-175		 A pseudo-sinusoidal generator is needed to realize a voltage-controlled vector-sum phase shifter that has linear phase c... [more] ED2009-192 MW2009-175
pp.99-103
 Results 1 - 5 of 5  /   
Choose a download format for default settings. [NEW !!]
Text format pLaTeX format CSV format BibTeX format
Copyright and reproduction : All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)

[Return to Top Page]

[Return to IEICE Web Page]
The Institute of Electronics, Information and Communication Engineers (IEICE), Japan