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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
ICD, CPSY 2015-12-18
09:25
Kyoto Kyoto Institute of Technology Substrate Noise Isolation Improvement by Helium-3 Ion Irradiation Technique in a Triple-well CMOS Process
Ning Li (Tokyo Tech), Takeshi Inoue (S.H.I.Examination & Inspection), Takuichi Hirano, Jian Pang, Rui Wu, Kenichi Okada (Tokyo Tech), Hitoshi Sakane (S.H.I.Examination & Inspection), Akira Matsuzawa (Tokyo Tech) ICD2015-84 CPSY2015-97
 [more] ICD2015-84 CPSY2015-97
pp.75-80
EMCJ, IEE-EMC, MW, EST [detail] 2015-10-23
15:00
Miyagi Sakura Hall, Katahira Campus, Tohoku Univ. Design of Low Loss 60 GHz CMOS On-Chip Dipole Antenna By Helium-3 Ion Irradiation
Takuichi Hirano, Ning Li, Kenichi Okada, Akira Matsuzawa, Jiro Hirokawa, Makoto Ando (Tokyo Tech.), Tsuyoshi Inoue, Hitoshi Sakane (SHIEI) EMCJ2015-79 MW2015-118 EST2015-89
60 GHz CMOS on-chip antenna is low radiation efficiency due to large loss of silicon (Si) substrate. In this paper, a 60... [more] EMCJ2015-79 MW2015-118 EST2015-89
pp.123-127
MWP, EMT, PN, LQE, OPE, EST, IEE-EMT [detail] 2014-01-24
09:00
Kyoto Doshisha University Electromagnetic Simulation of High Resistance Silicon Substrate by Helium ion Irradiation
Yuki Yao, Takuichi Hirano, Ning Li, Kenichi Okada, Akira Matsuzawa, Jiro Hirokawa, Makoto Ando (Tokyo Inst. of Tech.), Takeshi Inoue, Akinori Masaoka, Hitoshi Sakane (SEI) PN2013-61 OPE2013-175 LQE2013-161 EST2013-110 MWP2013-81
A helium(He)-3 ion bombardment technique has been proposed for creating locally high resistivity silicon substrate areas... [more] PN2013-61 OPE2013-175 LQE2013-161 EST2013-110 MWP2013-81
pp.181-185
 Results 1 - 3 of 3  /   
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