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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, CAS, MSS, SIP 2016-06-17
16:40		 Aomori Hirosaki Shiritsu Kanko-kan On Study of Data Reliability of Threshold Sensing with Majority Circuit
Akito Hoshide, Bo Liu, Takuro Ishida, Shigetoshi Nakatake (Univ. of Kitakyushu) CAS2016-35 VLD2016-41 SIP2016-69 MSS2016-35		  [more] CAS2016-35 VLD2016-41 SIP2016-69 MSS2016-35
pp.191-196
VLD, CAS, MSS, SIP 2016-06-17
17:00		 Aomori Hirosaki Shiritsu Kanko-kan Analog Characterization Module based on A/D and D/A Converters
Daishi Isogai, Bo Liu, Futa Yoshinaka, Shigetoshi Nakatake (Univ. of Kitakyushu) CAS2016-36 VLD2016-42 SIP2016-70 MSS2016-36		  [more] CAS2016-36 VLD2016-42 SIP2016-70 MSS2016-36
pp.197-202
VLD, CAS, MSS, SIP 2016-06-17
17:20		 Aomori Hirosaki Shiritsu Kanko-kan Soft-Coupling Module with A/D and D/A Converters
Futa Yoshinaka, Bo Liu, Daishi Isogai, Shigetoshi Nakatake (univ.kitakyushu) CAS2016-37 VLD2016-43 SIP2016-71 MSS2016-37		  [more] CAS2016-37 VLD2016-43 SIP2016-71 MSS2016-37
pp.203-208
VLD, IPSJ-SLDM 2010-05-20
14:20		 Fukuoka Kitakyushu International Conference Center Variation Modeling of Current Sources by D/A Converter Analysis
Bo Liu, Qing Dong, Bo Yang, Shigetoshi Nakatake (Univ. of Kitakyushu) VLD2010-10		  [more] VLD2010-10
pp.85-89
VLD 2010-03-10
15:50		 Okinawa   Variation-Tolerant Decomposition of MOS Transistor
Bo Liu, Atsushi Ochi, Shigetoshi Nakatake (Univ. of Kitakyushu) VLD2009-104		 Aiming at the layout automation based on the regular bulk structure
in MOS analog circuits, we study how to decompose a... [more]		 VLD2009-104
pp.31-36
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