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| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| SCE | 2020-01-17 13:15 |
Kanagawa | [Poster Presentation]
High-Throughput Gate-Level-Pipelined SFQ Multipliers Ikki Nagaoka, Masamitsu Tanaka, Kyosuke Sano, Taro Yamashita (Nagoya Univ.), Koji Inoue (Kyushu Univ.), Akira Fujimaki (Nagoya Univ.)  SCE2019-30 |
[more] | SCE2019-30 pp.1-4 |
|
| SCE | 2019-01-23 13:30 |
Tokyo | Development of 30-GHz Datapath for Bit-Parallel, Gate-Level-Pipelined Rapid Single-Flux-Quantum Microprocessors Ikki Nagaoka (Nagoya Univ), Yuki Hatanaka (Mitsubishi Elec), Yuichi Matsui (Nagoya Univ), Koki Ishida (Kyushu Univ), Masamitsu Tanaka, Kyosuke Sano, Taro Yamashita (Nagoya Univ), Takatsugu Ono, Koji Inoue (Kyushu Univ), Akira Fujimaki (Nagoya Univ) SCE2018-30 |
We have started development of high-throughput single-flux-quantum (SFQ) microprocessors with the aim of higher throughp... [more] | SCE2018-30 pp.29-34 |
|
| RECONF | 2018-09-17 17:05 |
Fukuoka | LINE Fukuoka Cafe Space | [Invited Talk]
Expectations to Reconfigurable Computing
-- An Architecture Perspective -- Koji Inoue (Kyushu University) RECONF2018-26 |
[more] | RECONF2018-26 p.41 |
| HWS | 2018-04-13 14:20 |
Fukuoka | Whitelisting Approach Using Hardware Performance Counters in IoT Microprocessors Ghadeer Almusaddar, Takatsugu Ono (Kyushu Univ.), Smruti Sarangi (IITD), Koji Inoue (Kyushu Univ.) HWS2018-6 |
[more] | HWS2018-6 pp.29-34 |
|
| SCE | 2017-08-09 14:35 |
Aichi | Nagoya Univ. (Higashiyama Campus) | Design of Component Circuits for Rapid Single-Flux-Quantum Gate-Level-Pipelined Microprocessors Yuki Hatanaka, Yuichi Matsui, Masamitsu Tanaka, Kyosuke Sano, Akira Fujimaki (Nagoya Univ.), Koki Ishida, Takatsugu Ono, Koji Inoue (Kyushu Univ.) SCE2017-17 |
We have started development of high-throughput rapid single-flux-quantum (RSFQ) microprocessors with the aim of higher p... [more] | SCE2017-17 pp.37-42 |
| HWS (2nd) |
2017-06-12 15:00 |
Aomori | Hirosaki University | Malware Attacks and Countermeasures in IoT Systems
-- From the perspective of processor architecture -- Takatsugu Ono, Koyo Miyamura, Koji Inoue (Kyushu Univ.) |
(Advance abstract in Japanese is available) [more] | |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-30 11:20 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | Shift-Register-Based Single-Flux-Quantum Cache Memory Architecture Koki Ishida (Kyushu Univ.), Masamitsu Tanaka (Nagoya Univ.), Takatsugu Ono, Koji Inoue (Kyushu Univ.) CPM2016-84 ICD2016-45 IE2016-79 |
[more] | CPM2016-84 ICD2016-45 IE2016-79 pp.39-44 |
| CPSY, DC, IPSJ-ARC (Joint) [detail] |
2016-08-09 12:15 |
Nagano | Kissei-Bunka-Hall (Matsumoto) | Formulating Attack Condition on Received Signal Strength Indicator based Device Authentication Tatsuya Fujii, Takatsugu Ono, Haruichi Kanaya, Koji Inoue (Kyushu Univ.) CPSY2016-22 DC2016-19 |
Spoofing attack in wireless communications is a critical issue, in which a malicious transmitter attempts to pretend to ... [more] | CPSY2016-22 DC2016-19 pp.139-146(CPSY), pp.15-22(DC) |
| VLD, CAS, MSS, SIP | 2016-06-17 10:10 |
Aomori | Hirosaki Shiritsu Kanko-kan | A Parallel Adder Circuit based on Optical Pass-gate Logic and Its Evaluation with Optoelectronic Circuit Simulator Tohru Ishihara (Kyoto Univ.), Akihiko Shinya (NTT), Koji Inoue (Kyushu Univ.), Kengo Nozaki, Masaya Notomi (NTT) CAS2016-20 VLD2016-26 SIP2016-54 MSS2016-20 |
[more] | CAS2016-20 VLD2016-26 SIP2016-54 MSS2016-20 pp.109-114 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-02 15:55 |
Nagasaki | Nagasaki Kinro Fukushi Kaikan | Dynamic Frame-rate Optimization for Low Energy Object Tracking Yusuke Inoue, Takatsugu Ono, Koji Inoue (Kyushu Univ.) CPM2015-133 ICD2015-58 |
The importance of on-line object tracking (OLOT) to pursue target objects in captured image frames is rapidly increasing... [more] | CPM2015-133 ICD2015-58 pp.33-38 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-03 11:15 |
Nagasaki | Nagasaki Kinro Fukushi Kaikan | Logic Design of A Single-Flux-Quantum Microprocessor Koki Ishida, Tomonori Tsuhata (Kyushu Univ.), Masamitsu Tanaka (Nagoya Univ.), Takatsugu Ono, Koji Inoue (Kyushu Univ.) CPSY2015-73 |
CMOS microprocessors have been facing a limitation for clock speed improvement because of increasing computing power. U... [more] |
CPSY2015-73 pp.69-74 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-03 11:40 |
Nagasaki | Nagasaki Kinro Fukushi Kaikan | Accuracy Analysis of Machine Learning based Performance Modeling for Microprocessors Yoshihiro Tanaka, Takatsugu Ono, Koji Inoue (Kyushu Univ.) CPSY2015-74 |
When designing a computer system, a system designer need to select an appropriate processor to satisfy design constraint... [more] | CPSY2015-74 pp.75-80 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2013-11-27 11:35 |
Kagoshima | Low Energy Tracking System with Dynamic Frame-Rate Optimization Serina Egawa, Koji Inoue (Kyushu Univ.) CPM2013-114 ICD2013-91 |
[more] | CPM2013-114 ICD2013-91 pp.37-42 |
|
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2013-11-27 13:00 |
Kagoshima | Exploring Microarchitecture for Next Generation Single-Flux-Quantum Processors Jumpei Yokota, Tomonori Tsuhata, Koji Inoue (Kyushu Univ.), Masamitsu Tanaka (Nagoya Univ.) CPM2013-115 ICD2013-92 |
[more] | CPM2013-115 ICD2013-92 pp.43-48 |
|
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-26 16:00 |
Fukuoka | Centennial Hall Kyushu University School of Medicine | [Invited Talk]
Way Selection Cache for Low Power Computing Koji Inoue (Kyushu Univ.) CPSY2012-49 |
[more] | CPSY2012-49 p.13 |
| IE, SIP, ICD, VLD, IPSJ-SLDM [detail] | 2012-10-19 13:00 |
Iwate | Hotel Ruiz | Accelerator Architecture for Multi Scale Filter Operation Shinya Ueno, Gauthier Lovic Eric, Koji Inoue, Kazuaki Murakami (Kyushu Univ.) VLD2012-51 SIP2012-73 ICD2012-68 IE2012-75 |
Image recognition processing includes a number of filter operations which dominate the total execution time. Exploiting... [more] |
VLD2012-51 SIP2012-73 ICD2012-68 IE2012-75 pp.59-64 |
| ICD, IE, SIP, IPSJ-SLDM [detail] | 2011-10-24 14:20 |
Miyagi | Ｉｃｈｉｎｏｂｏ(Sendai) | Three-Dimensional Accelerator Architecture for Image Recognition Shinya Ueno, Gauthier Lovic Eric, Koji Inoue, Kazuaki Murakami (Kyushu Univ.) SIP2011-63 ICD2011-66 IE2011-62 |
Image recognition used widely in several areas needs high-performance and low power processor. Accelerator is an effecti... [more] | SIP2011-63 ICD2011-66 IE2011-62 pp.7-12 |
| ICD, IE, SIP, IPSJ-SLDM [detail] | 2011-10-25 15:05 |
Miyagi | Ｉｃｈｉｎｏｂｏ(Sendai) | Simultaneous Optimization of Cache Way Selection and Code Placement for Reducing the Memory Access Energy Consumption Junshi Takata (Kyushu Univ.), Tohru Ishihara (Kyoto Univ.), Koji Inoue (Kyushu Univ.) SIP2011-76 ICD2011-79 IE2011-75 |
The paper proposes a technique which simultaneously finds the optimal cache way allocation and code placement for given ... [more] | SIP2011-76 ICD2011-79 IE2011-75 pp.89-94 |
| ICD, IPSJ-ARC | 2011-01-20 16:20 |
Kanagawa | Keio University (Hiyoshi Campus) | [Panel Discussion]
Will 3D-ICs Become Mainstream ? Koji Inoue (Kyushu Univ.), Nobuaki Miyakawa (HRI), Kazuya Okamoto (Osaka Univ.), Ken Takeuchi (Univ. of Tokyo), Hanpei Koike (AIST) |
[more] | ICD2010-133 p.37 |
| ICD, IPSJ-ARC | 2011-01-21 11:00 |
Kanagawa | Keio University (Hiyoshi Campus) | Performance Evaluation of 3D Integrated Multi-core Processors with Temperature Consideration Takaaki Hanada, Koji Inoue, Kazuaki Murakami (Kyushu Univ.) |
In this paper, we evaluate three-dimensional (3D) multi-core processors with temperature constraint. 3D multi-core pro... [more] |
ICD2010-135 pp.51-56 |
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