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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
ICD 2024-04-12
14:55		 Kanagawa
(Primary: On-site, Secondary: Online)		 [Invited Lecture] 遠端ビット線プリチャージとウィークビットトラッキング回路を用いて0.48 - 1.2V動作電圧範囲と27.6Mbit/mm^2の高集積密度を実現する3ナノメートルSRAM
Yumito Aoyagi, Makoto Yabuuchi, Tomotaka Tanaka, Yuichiro Ishii, Yoshiaki Osada, Takaaki Nakazato, Koji Nii, Isabel Wang, Yu-Hao Hsu, Hong-Chen Cheng, Hung-Jen Liao, Tsung-Yung Jonathan Chang (TSMC) 		 [more]
ICD 2024-04-12
15:20		 Kanagawa
(Primary: On-site, Secondary: Online)		 [Invited Lecture] 3.7-GHz Multi-Bank High-Current Single-Port Cache SRAM with 0.5V-1.4V Wide Voltage Range Operation in 3nm FinFET for HPC Applications
Yoshiaki Osada, Takaaki Nakazato, Koji Nii, Jhon-Jhy Liaw, Shien-Yang Michael Wu, Quincy Li, Hidehiro Fujiwara, Hung-Jen Liao, Tsung-Yung Jonathan Chang (TSMC) 		 [more]
ICD 2009-04-14
10:15		 Miyagi Daikanso (Matsushima, Miyagi) A Process-Variation-Tolerant Dual-Power-Supply SRAM with 0.179μm2 Cell in 40nm CMOS Using Level-Programmable Wordline Driver
Yuki Fujimura, Osamu Hirabayashi, Atsushi Kawasumi, Azuma Suzuki, Yasuhisa Takeyama, Keiichi Kushida, Takahiko Sasaki, Akira Katayama, Gou Fukano, Takaaki Nakazato, Yasushi Shizuki, Natsuki Kushiyama, Tomoaki Yabe (Toshiba Co.) ICD2009-5		 We present a dual-power-supply SRAM with 0.179$\mu$m2 cell in 40nm CMOS, which is 10% smaller than the SRAM scaling tren... [more] ICD2009-5
pp.21-26
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