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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 6 of 6  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] 2019-01-31
09:55
Kanagawa Raiosha, Hiyoshi Campus, Keio University A Deduplication Mechanism for Effectively-once Semantics Using FPGA NIC
Koji Suzuki, Koya Mitsuzuka, Takuma Iwata, Hiroki Matsutani (Keio Univ.) VLD2018-83 CPSY2018-93 RECONF2018-57
(To be available after the conference date) [more] VLD2018-83 CPSY2018-93 RECONF2018-57
pp.65-70
IPSJ-ARC, VLD, CPSY, RECONF, IPSJ-SLDM [detail] 2018-01-19
13:50
Kanagawa Raiosha, Hiyoshi Campus, Keio University Accelerating Sequential Learning Algorithm OS-ELM Using FPGA-NIC
Mineto Tsukada, Koya Mitsuzuka, Kohei Nakamura, Yuta Tokusashi, Hiroki Matsutani (Keio Univ.) VLD2017-83 CPSY2017-127 RECONF2017-71
 [more] VLD2017-83 CPSY2017-127 RECONF2017-71
pp.133-138
IPSJ-ARC, VLD, CPSY, RECONF, IPSJ-SLDM [detail] 2018-01-19
14:25
Kanagawa Raiosha, Hiyoshi Campus, Keio University Accelerating Serialization Protocols for Network-Attached FPGAs
Takuma Iwata, Koya Mitsuzuka, Kohei Nakamura, Yuta Tokusashi, Hiroki Matsutani (Keio Univ.) VLD2017-84 CPSY2017-128 RECONF2017-72
(To be available after the conference date) [more] VLD2017-84 CPSY2017-128 RECONF2017-72
pp.139-144
CPSY, DC, IPSJ-ARC
(Joint) [detail]
2017-07-28
09:30
Akita Akita Atorion-Building (Akita) An FPGA NIC Based Caching for Blockchain Databases
Yuma Sakakibara, Koya Mitsuzuka, Shin Morishima, Hiroki Matsutani (Keio Univ.) CPSY2017-31
(To be available after the conference date) [more] CPSY2017-31
pp.165-170
CPSY, DC, IPSJ-ARC
(Joint) [detail]
2017-07-28
16:15
Akita Akita Atorion-Building (Akita) Efficient Message Queuing System Using FPGA NIC
Koya Mitsuzuka, Hiroki Matsutani (Keio Univ.) CPSY2017-38
Although the FPGA message queuing systems are superior in terms of power efficiency, applicable situation is limited bec... [more] CPSY2017-38
pp.215-220
CPSY, RECONF, VLD, IPSJ-SLDM, IPSJ-ARC [detail] 2017-01-25
14:25
Kanagawa Hiyoshi Campus, Keio Univ. Proxy Responses for MapReduce Delayed Task Using 10GbE FPGA Switch
Koya Mitsuzuka, Ami Hayashi (Keio Univ.), Hiroki Matsutani (Keio Univ./PRESTO/NII) VLD2016-100 CPSY2016-136 RECONF2016-81
(To be available after the conference date) [more] VLD2016-100 CPSY2016-136 RECONF2016-81
pp.209-214
 Results 1 - 6 of 6  /   
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