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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
SDM |
2021-10-21 10:45 |
Online |
Online |
[Invited Talk]
Influence of Fluorine on Reliabilities of SiO2 and SixNy Films Yuichiro Mitani (Tokyo City Univ.) SDM2021-44 |
In this paper, the influence of Fluorine incorporation into SiO2 and Si nitride (SixNy) films which are widely used in t... [more] |
SDM2021-44 pp.1-4 |
LQE, OPE, CPM, EMD, R |
2019-08-22 16:45 |
Miyagi |
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[Invited Talk]
3D Flash Memory Cell Reliability Yuichiro Mitani, Harumi Seki, Takanori Asano, Yasushi Nakasaki (Toshiba Memory) R2019-26 EMD2019-24 CPM2019-25 OPE2019-53 LQE2019-31 |
As conventional planar NAND flash memories are limited from physical and electrical scaling point of view, the three-dim... [more] |
R2019-26 EMD2019-24 CPM2019-25 OPE2019-53 LQE2019-31 pp.35-38 |
SDM |
2013-11-15 15:00 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Impacts of Channel Doping on Random Telegraph Signal Noise and Successful Noise Suppression by Mobility Enhancement Jiezhi Chen, Yusuke Higashi, Izumi Hirano, Yuichiro Mitani (Toshiba) SDM2013-114 |
In this work, impacts of channel doping concentration on single-trap and multiple-trap induced random telegraph signal (... [more] |
SDM2013-114 pp.83-86 |
SDM |
2012-11-15 15:20 |
Tokyo |
Kikai-Shinko-Kaikan Bldg |
Neutral and Attractive Traps in Random Telegraph Signal Noise Phenomena using (100)- and (110)-Oriented CMOSFETs Jiezhi Chen, Izumi Hirano, Kosuke Tatsumura, Yuichiro Mitani (Toshiba Corp) SDM2012-103 |
(To be available after the conference date) [more] |
SDM2012-103 pp.21-24 |
ICD |
2008-04-18 13:05 |
Tokyo |
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[Invited Talk]
15nm Planar Bulk SONOS-type Memory with Double Junstion Tunnel Layers Ryuji Ohba, Yuichiro Mitani, Naoharu Sugiyama, Shinobu Fujita (Toshiba) ICD2008-11 |
15nm gate length bulk-planar SONOS-type memory device, which has Si nanocrystal layer lying between double tunnel oxides... [more] |
ICD2008-11 pp.57-62 |
SDM |
2008-03-14 13:05 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
15nm Planar Bulk SONOS-type Memory with Double Junstion Tunnel Layers Ryuji Ohba, Yuichiro Mitani, Naoharu Sugiyama, Shinobu Fujita (Toshiba) SDM2007-273 |
15nm gate length bulk-planar SONOS-type memory device, which has Si nanocrystal layer lying between double tunnel oxides... [more] |
SDM2007-273 pp.1-6 |
ICD |
2007-04-13 14:20 |
Oita |
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25nm SONOS-type Memory Device usinh Double Tunnel Junction Ryuji Ohba, Yuichiro Mitani, Naoharu Sugiyama, Shinobu Fujita (Toshiba Co.) ICD2007-16 |
When a nano meter scale conductive island is lying between two tunnel resistance, this structure is called "Double junct... [more] |
ICD2007-16 pp.89-93 |
SDM |
2006-06-22 10:55 |
Hiroshima |
Faculty Club, Hiroshima Univ. |
Realization of SiON films with small ΔVfb Daisuke Matsushita, Koichi Muraoka, Yasushi Nakasaki, Koichi Kato, Shoko Kikuchi, Kiwamu Sakuma, Yuichiro Mitani (toshiba R&D center), Mariko Takayanagi, Kazuhiro Eguchi (Semiconductor Company) |
[more] |
SDM2006-56 pp.81-86 |
SDM |
2006-06-22 11:20 |
Hiroshima |
Faculty Club, Hiroshima Univ. |
Influence of Nitrogen and Hydrogen on NBTI in Ultrathin SiON Yuichiro Mitani, Hideki Satake (Toshiba Corp.) |
NBTI(Negative Bias Temperature Instability) has become increasingly serious in the context of effort to develop highly r... [more] |
SDM2006-57 pp.87-92 |
ICD |
2006-04-14 14:20 |
Oita |
Oita University |
Floating Gate Type Planar MOSFET Memory with 35 nm Gate Length using Double Junction Tunneling Ryuji Ohba, Yuichiro Mitani, Naoharu Sugiyama, Shinobu Fujita (Toshiba) |
[more] |
ICD2006-19 pp.103-107 |
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