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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 7 of 7  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
SDM 2022-06-21
17:20
Aichi Nagoya Univ. VBL3F Formation of Ultra-Thin Nickel Silicide Layer with controlled Surface Morphology and Crystalline Phase on SiO2
Keisuke Kimura, Noriyuki Taoka, Shunsuke Nishimura, Akio Ohta, Katsunori Makihara, Seiichi Miyazaki (Nagoya. Univ) SDM2022-31
Recently, a device with metal nanosheet (MNS) has been attracted much attention. However, control of surface morphology ... [more] SDM2022-31
pp.27-30
R, EMD, CPM, LQE, OPE 2017-09-01
09:10
Aomori   Wide Wavelength Sweep & Low Voltage Operation of Tunable MEMSVCSEL Employing Mechanical Resonance
Shun Nishimura, Masanori Nakahama, Shunya Inoue, Akihiro Matutani, Takahiro Sakaguti, Fumio Koyama (Tokyo Inst. of Tech.) R2017-31 EMD2017-25 CPM2017-46 OPE2017-55 LQE2017-28
WWe demonstrated the low voltage and high speed wavelength sweep operation of 850 nm MEMS VCSELs by using high-Q mechani... [more] R2017-31 EMD2017-25 CPM2017-46 OPE2017-55 LQE2017-28
pp.37-40
MSS, CAS, IPSJ-AL [detail] 2016-11-25
12:55
Hyogo Kobe Institute of Computing Formal Description of Synchronization by Functional Definition of Synchronous Circuits
Shunji Nishimura, Motoki Amagasaki, Toshinori Sueyoshi (Kumamoto Univ.) CAS2016-73 MSS2016-53
Synchronous circuits are usually defined as D-Flipflop (D-FF) synchronized circuits, but it is doubtful that D-FF comple... [more] CAS2016-73 MSS2016-53
pp.99-104
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2014-11-26
10:45
Oita B-ConPlaza A hardware description method and sematics providing a timing constrant
Shunji Nishimura, Motoki Amagasaki, Toshinori Sueyoshi (Kumamoto Univ.) VLD2014-82 DC2014-36
Formal verification methods are wide-spreading due to its mathmatical rigorousaspect, although they limited to synchroun... [more] VLD2014-82 DC2014-36
pp.81-86
RECONF 2014-09-19
14:40
Hiroshima   Formal Verification System of Multi-clock Synchronous Circuits on Multimodal Logic
Shunji Nishimura, Motoki Amagasaki, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2014-33
Regardless of wide using of a formal verification methods, almost all of the methods limited to single-clock synchrounou... [more] RECONF2014-33
pp.93-98
US 2013-11-11
14:00
Ishikawa Kanazawa Inst. Tech. Experimental study of gene transfer into suspension cells by LIESW
Mieko Kogi, Naohisa Sugiyama, Takayasu Yanagisawa, Syun Nishimura, Koji Aizawa, Yoshiaki Tokunaga (Kanazawa Inst. of Tech.) US2013-55
Since the gene transfection with LIESW is categorized as a physical method, we have thought that transfection can be app... [more] US2013-55
pp.11-14
US 2012-10-22
14:25
Ishikawa Kanazawa Inst. Tech. Transfer of FITC dextran by LIESW on HeLa cells
Terue Takeuchi, Mieko Kogi, Koji Aizawa, Syun Nishimura, Masataka Kimura, Motoaki Nishiwaki, Yoshiaki Tokunaga (KIT) US2012-64
We have developed a method of the gene transfection that has used the laser induced emergent stress wave (LIESW) generat... [more] US2012-64
pp.5-8
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