IEICE Technical Committee Submission System
Conference Schedule
Online Proceedings
[Sign in]
Tech. Rep. Archives
    [Japanese] / [English] 
( Committee/Place/Topics  ) --Press->
 
( Paper Keywords:  /  Column:Title Auth. Affi. Abst. Keyword ) --Press->

All Technical Committee Conferences  (Searched in: All Years)

Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 20 of 114  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] 2023-11-15
15:05
Kumamoto Civic Auditorium Sears Home Yume Hall
(Primary: On-site, Secondary: Online)
Co-design of Strong Lottery Ticket Hypothesis and FeFET-based CiM
Kenshin Yamauchi, Ayumu Yamada, Naoko Misawa, Seong-Kun Cho, Kasidit Toprasertpong, Shinichi Takagi, Chihiro Matsui, Ken Takeuchi (Univ. of Tokyo) VLD2023-40 ICD2023-48 DC2023-47 RECONF2023-43
The Strong Lottery Hypothesis insists that an initialized neural network contains well performance partial networks and ... [more] VLD2023-40 ICD2023-48 DC2023-47 RECONF2023-43
pp.60-63
VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] 2023-11-16
09:30
Kumamoto Civic Auditorium Sears Home Yume Hall
(Primary: On-site, Secondary: Online)
Computation-in-Memory Generating Approximate Random Weight for Neuromorphic Computing
Naoko Misawa, Shunsuke Koshino, Chihiro Matsui, Ken Takeuchi (Univ. of Tokyo) VLD2023-46 ICD2023-54 DC2023-53 RECONF2023-49
 [more] VLD2023-46 ICD2023-54 DC2023-53 RECONF2023-49
pp.94-95
VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] 2023-11-16
09:55
Kumamoto Civic Auditorium Sears Home Yume Hall
(Primary: On-site, Secondary: Online)
Quantization Method of Computation-in-Memory for 1/10 Memory Size Vision Transformer
Naoko Misawa, Ryuhei Yamaguchi, Ayumu Yamada, Chihiro Matsui, Ken Takeuchi (Univ. of Tokyo) VLD2023-47 ICD2023-55 DC2023-54 RECONF2023-50
 [more] VLD2023-47 ICD2023-55 DC2023-54 RECONF2023-50
pp.96-98
VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] 2023-11-16
10:20
Kumamoto Civic Auditorium Sears Home Yume Hall
(Primary: On-site, Secondary: Online)
Design and Error-tolerance of FeFET-based CiM for Hyperdimensional Computing
Chihiro Matsui, Eitaro Kobayashi, Naoko Misawa, Kasidit Toprasertpong, Shinichi Takagi, Ken Takeuchi (Univ. of Tokyo) VLD2023-48 ICD2023-56 DC2023-55 RECONF2023-51
A high-speed massively parallel operation for learning and inference in Hyperdimensional Computing (HDC) using voltage-s... [more] VLD2023-48 ICD2023-56 DC2023-55 RECONF2023-51
pp.99-100
VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] 2023-11-17
10:00
Kumamoto Civic Auditorium Sears Home Yume Hall
(Primary: On-site, Secondary: Online)
CiM-based Low-bit Neural Network Accelerator Design Method with automatic I/O range optimization
Ayumu Yamada, Naoko Misawa, Chihiro Matsui, Ken Takeuchi (Univ. of Tokyo) VLD2023-68 ICD2023-76 DC2023-75 RECONF2023-71
A neural network training algorithm, LIORAT, is proposed to improve the efficiency of neural network accelerators with R... [more] VLD2023-68 ICD2023-76 DC2023-75 RECONF2023-71
pp.198-199
SDM, ICD, ITE-IST [detail] 2021-08-18
10:15
Online Online [Invited Talk] Voltage-sensing FeFET CiM with MAC by Source-follower Read and Charge-sharing
Chihiro Matsui, Kasidit Toprasertpong, Shinichi Takagi, Ken Takeuchi (Univ. Tokyo) SDM2021-37 ICD2021-8
An energy-efficient and high-throughput HZO FeFET Computation-in-Memory (CiM) is proposed. The FeFET CiM performs voltag... [more] SDM2021-37 ICD2021-8
pp.38-41
SDM 2021-06-22
16:50
Online Online Application-induced TaOx ReRAM Cell Reliability Variation Tolerated High-speed Storage
Chihiro Matsui, Ken Takeuchi (Univ. Tokyo) SDM2021-27
Storage application induces various types or errors in TaOx ReRAM cells and the storage performance degrades. To improve... [more] SDM2021-27
pp.21-22
SDM 2021-06-22
17:10
Online Online Influence of quantized bit precision and bit-error rate in Computation-in-Memory with ReRAM on optimal answers of combinatorial optimization problems
Naoko Misawa, Kenta Taoka, Shunsuke Koshino, Chihiro Matsui, Ken Takeuchi (Univ. Tokyo) SDM2021-28
The knapsack problem, one of combinatorial optimization problems, is solved effectively by simulated annealing in ReRAM ... [more] SDM2021-28
pp.23-26
HWS, VLD [detail] 2020-03-05
15:20
Okinawa Okinawa Ken Seinen Kaikan
(Cancelled but technical report was issued)
[Memorial Lecture] Workload-aware Data-eviction Self-adjusting System of Multi-SCM Storage to Resolve Trade-off between SCM Data-retention Error and Storage System Performance
Reika Kinoshita, Chihiro Matsui, Atsuya Suzuki, Shouhei Fukuyama, Ken Takeuchi (Chuo Univ.) VLD2019-119 HWS2019-92
Storage Class Memories (SCMs) are used as non-volatile (NV) cache memory as well as storage. Multi-SCM storage with two ... [more] VLD2019-119 HWS2019-92
pp.145-150
VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]
2019-11-14
14:15
Ehime Ehime Prefecture Gender Equality Center Neural Network-based Lifetime Prediction and Reliability Enhancement Techniques for 3D NAND Flash Memory
Masaki Abe, Ken Takeuchi (Chuo Univ.) ICD2019-30 IE2019-36
NAND flash memories have lifetime such as data-retention time and read cycles. This paper proposes neural network techni... [more] ICD2019-30 IE2019-36
pp.7-12
VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]
2019-11-14
14:40
Ehime Ehime Prefecture Gender Equality Center Ferroelectric FET-based Parallel Product-Sum Operation Neuromorphic Circuits
Koki Kamimura, Susumu Nohmi, Ken Takeuchi (Chuo Univ.) ICD2019-31 IE2019-37
In recent years, Moore’s Law which has supported the improvement of semiconductor performance is coming to an end. There... [more] ICD2019-31 IE2019-37
pp.13-17
VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]
2019-11-15
15:45
Ehime Ehime Prefecture Gender Equality Center Design of optimal NV-memory configuration for hybrid SSD with QLC NAND flash memory
Yoshiki Takai, Mamoru Fukuchi, Chihiro Matsui, Reika Kinoshita, Ken Takeuchi (Chuo Univ.) ICD2019-41 IE2019-47
In order to expand capacity and reduce cost of NAND flash memory, the number of bits per cell has been increased. Howeve... [more] ICD2019-41 IE2019-47
pp.59-63
PN, EMT, OPE, EST, MWP, LQE, IEE-EMT [detail] 2019-01-17
11:40
Osaka Osaka University Nakanoshima Center A study of deep dry etching for Photonic Crystal CirD Laser
Li Zeng, Shun Mizoguchi, Xiuyu Zhang, Kento Takeuchi, Hirotake Kajii, Masato Morifuji, Akihiro Maruta, Masahiko Kondow (Osaka Univ.) PN2018-35 EMT2018-69 OPE2018-144 LQE2018-154 EST2018-82 MWP2018-53
In order to fabricate a photonic crystal laser with circular defect (CirD) resonator, we study deep dry etching of GaAs ... [more] PN2018-35 EMT2018-69 OPE2018-144 LQE2018-154 EST2018-82 MWP2018-53
pp.23-26
VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]
2018-12-07
13:45
Hiroshima Satellite Campus Hiroshima Autonomous SCM capacity adjustment method in SCM/NAND flash hybrid storage
Chihiro Matsui, Ken Takeuchi (Chuo Univ.) CPM2018-94 ICD2018-55 IE2018-73
Performance of hybrid storage with storage class memory (SCM) and NAND flash memory is improved by using SCM as non-vola... [more] CPM2018-94 ICD2018-55 IE2018-73
pp.29-30
ICD 2018-04-19
10:10
Tokyo   Reliability Enhancement Technique with Horizontal Error Detection and Vertical-LDPC in 3D-TLC NAND Flash Memories
Shun Suzuki, Yoshiaki Deguchi, Toshiki Nakamura, Kyoji Mizoguchi, Ken Takeuchi (Chuo Univ.) ICD2018-1
Conventional Asymmetric Coding (AC) has been proposed for improving NAND flash memories. In this work, Horizontal Error ... [more] ICD2018-1
pp.1-6
ICD 2018-04-19
10:35
Tokyo   Application-optimized heterogeneously-integrated storage with non-volatile memories
Chihiro Matsui, Ken Takeuchi (Chuo Univ.) ICD2018-2
Data center storages require application-optimized heterogeneous integration of non-volatile memories. Two types of stor... [more] ICD2018-2
pp.7-10
ICD 2018-04-19
11:00
Tokyo   [Invited Talk] Data-aware Computing with Highly Reliable SSD System
Ken Takeuchi (Chuo Univ.) ICD2018-3
 [more] ICD2018-3
p.11
SDM 2018-01-30
13:30
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Lateral Charge Migration Suppression Technique of 3D-NAND Flash by Vth Nearing
Kyoji Mizoguchi, Shohei Kotaki, Yoshiaki Deguchi, Ken Takeuchi (Chuo Univ.) SDM2017-93
In the near data computing, a SSD controller embeds more processing units and RAMs to execute a part of application whic... [more] SDM2017-93
pp.9-12
VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]
2017-11-07
13:50
Kumamoto Kumamoto-Kenminkouryukan Parea Low Voltage Operation Boost Converter for ReRAM/NAND Flash Memory Hybrid SSD
Kenta Suzuki, Kota Tsurumi, Ken Takeuchi (Chuo Univ.) CPM2017-82 ICD2017-41 IE2017-67
 [more] CPM2017-82 ICD2017-41 IE2017-67
pp.15-20
LQE, LSJ 2017-05-26
13:10
Ishikawa   Generation of CEP-stable intense mid-infrared pulses via dual-wavelength optical parametric amplification, and their application to the study of strong electric field processes in solids
Keisuke Kaneshima (Hokkaido Univ.), Nobuhisa Ishii, Kengo Takeuchi, Jiro Itatani (Univ. of Tokyo) LQE2017-15
 [more] LQE2017-15
pp.61-62
 Results 1 - 20 of 114  /  [Next]  
Choose a download format for default settings. [NEW !!]
Text format pLaTeX format CSV format BibTeX format
Copyright and reproduction : All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan