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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
PRMU 2021-12-17
15:15		 Online Online An LSTM-based prefetcher exploiting delta correlation
Hiroki Taniai, Tomoki Nakamura, Toru Koizumi, Yuya Degawa, Hidetsugu Irie, Shuichi Sakai, Ryota Shioya (Tokyo Univ.) PRMU2021-53		 Prefetching is one of the major hardware techniques to improve the execution performance of programs in modern processor... [more] PRMU2021-53
pp.160-164
CPSY, DC, IPSJ-ARC [detail] 2020-07-30
11:00		 Online Online Instruction Prefetcher focusing on properties of Prefetch Distance
Tomoki Nakamura, Toru Koizumi, Yuya Degawa, Hidetsugu Irie, Shuichi Sakai, Ryota Shioya (UTokyo) CPSY2020-1 DC2020-1		 Instruction cache misses and branch target buffer (BTB) misses are performance bottlenecks in recent applications,
and ... [more]		 CPSY2020-1 DC2020-1
pp.1-8
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] 2020-02-27
17:20		 Kagoshima Yoron-cho Chuou-Kouminkan Implementation and Evaluation of Out-of-Order STRAIGHT Soft Processor
Satoshi Mitsuno, Toru Koizumi, Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai (Univ. of Tokyo) CPSY2019-105 DC2019-111		 (To be available after the conference date) [more] CPSY2019-105 DC2019-111
pp.105-110
ICD, CPSY, CAS 2018-12-21
16:40		 Okinawa   Developing the evaluation framework of the STRAIGHT architecture
Akifumi Fukuda, Toru Koizumi, Junichiro Kadomoto, Satoshi Nakae, Hidetsugu Irie, Shuichi Sakai (UTokyo) CAS2018-86 ICD2018-70 CPSY2018-52		 STRAIGHT architecture has achieved high performance and high efficiency with Coremark and Dhrystone because of its ISA s... [more] CAS2018-86 ICD2018-70 CPSY2018-52
pp.43-47
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