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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| ICD | 2014-04-17 14:50 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Lecture]
A 1Mb STT-MRAM for Nonvolatile Embedded Memories performing 1.5ns/2.1ns Random Read/Write Cycle Time
-- Background Write (BGW) Scheme applied to a 6T2MTJ Memory Cell -- Takashi Ohsawa, Hiroki Koike (Tohoku Univ.), Sadahiko Miura (NEC), Keizo Kinoshita (Tohoku Univ.), Hiroaki Honjo (NEC), Shoji Ikeda, Takahiro Hanyu, Hideo Ohno, Tetsuo Endoh (Tohoku Univ.)  ICD2014-7 |
[more] | ICD2014-7 pp.33-38 |
| ICD | 2014-04-18 15:15 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Lecture]
A power-gated MPU with 3-microsecond entry/exit delay using MTJ-based nonvolatile flip-flop Hiroki Koike (Tohoku Univ.), Noboru Sakimura, Ryusuke Nebashi, Yukihide Tsuji, Ayuka Morioka, Sadahiko Miura, Hiroaki Honjo, Tadahiko Sugibayashi (NEC), Takashi Ohsawa, Shoji Ikeda, Takahiro Hanyu, Hideo Ohno, Tetsuo Endoh (Tohoku Univ.) ICD2014-17 |
We propose a novel power-gated microprocessor unit (MPU) using a nonvolatile flip-flop (NV-F/F) with magnetic tunnel jun... [more] | ICD2014-17 pp.85-90 |
| USN, AN, MoNA (Joint) |
2010-01-21 12:00 |
Shizuoka | Actcity Hamamatsu | [Technology Exhibit]
HGAF: a hierarchical power saving technique using location information for sensor networks Takashi Osawa (Shizuoka Univ.), Susumu Ishihara (Science and Tech.) MoMuC2009-56 AN2009-52 USN2009-52 |
In the wireless sensor networks, wireless sensor nodes are placed at the observation area.Because wireless sensor nodes ... [more] | MoMuC2009-56 AN2009-52 USN2009-52 pp.27-28(MoMuC), pp.43-44(AN), pp.27-28(USN) |
| ICD | 2007-04-13 09:10 |
Oita | Floating Body RAM Technology and its Scalability to 32nm Node Hiroomi Nakajima, Naoki Kusunoki, Tomoaki Shino (Toshiba), Tomoki Higashi (TOSMEC), Takashi Ohsawa, Katsuyuki Fujita, Nobuyuki Ikumi, Fumiyoshi Matsuoka, Ryo Fukuda, Yohji Watanabe, Yoshihiro Minami (Toshiba), Atsushi Sakamoto (TJ), Jun Nishimura, Takeshi Hamamoto, Akihiro Nitayama (Toshiba) ICD2007-10 |
Technologies and improved performance of the Floating Body RAM are demonstrated. Reducing SOI thickness to 43nm, a 16Mb ... [more] | ICD2007-10 pp.53-58 |
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| ICD | 2006-04-13 11:35 |
Oita | Oita University | Technology development of 128Mb-FBC(Floating Body Cell) Memory by 90nm node CMOS process Hiroomi Nakajima, Yoshihiro Minami, Tomoaki Shino (SoC Center, Toshiba), Atsushi Sakamoto (TJ), Tomoki Higashi (TOSMEC), Naoki Kusunoki, Katsuyuki Fujita, Kosuke Hatsuda, Takashi Ohsawa, Nobutoshi Aoki, Hiroyoshi Tanimoto, Mutsuo Morikado, Kazumi Inoh, Takeshi Hamamoto, Akihiro Nitayama (SoC Center, Toshiba) |
A 128Mb SOI DRAM with FBC (Floating Body Cell) has been successfully developed for the first time. In order to realize f... [more] | ICD2006-5 pp.25-30 |
| SIP, ICD, IE, IPSJ-SLDM | 2005-10-20 16:50 |
Miyagi | Ichinobo, Sakunami-Spa | A 333MHz Random Cycle DRAM Using the Floating Body Cell Kosuke Hatsuda, Katsuyuki Fujita, Takashi Ohsawa (Toshiba Corp.) |
[more] | SIP2005-114 ICD2005-133 IE2005-78 pp.113-118 |
| ICD | 2005-04-14 11:40 |
Fukuoka | A 128Mb DRAM Using a 1T Gain Cell(FBC) on SOI Takashi Ohsawa, Katsuyuki Fujita, Kosuke Hatsuda (Toshiba), Tomoki Higashi (Toshiba Microelectronics), Mutsuo Morikado, Yoshihiro Minami, Tomoaki Shino, Hiroomi Nakajima, Kazumi Inoh, Takeshi Hamamoto, Shigeyoshi Watanabe (Toshiba) |
We report on a 128Mbit DRAM design using the capacitor-less DRAM cell or the floating body cell(FBC) on SOI. The cell of... [more] | ICD2005-5 pp.23-28 |
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