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Paper #
ICD
2005-04-15
10:30
Fukuoka
A 1.2V 1Mbit Embedded MRAM Core with Folded Bit-Line Array Architecture
Takaharu Tsuji
(
Renesas Technorogy
),
Hiroaki Tanizaki
(
Renesas Device Design
),
Masatoshi Ishikawa
,
Jun Otani
,
Yuichiro Yamaguchi
,
Shuichi Ueno
,
Tsukasa Oishi
,
Hideto Hidaka
(
Renesas Technorogy
)
A 1Mbit MRAM with a 0.81um2 1-Transistor 1-Magnetic Tunnel Junction (1T-1MTJ) cell using 0.13um 4LM logic technology has...
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ICD2005-13
pp.1-6
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