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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
ICD |
2013-04-12 14:45 |
Ibaraki |
Advanced Industrial Science and Technology (AIST) |
[Invited Lecture]
A 13.8pJ/Access/Mbit SRAM with Charge Collector Circuits for Effective Use of Non-Selected Bit Line Charges Shinichi Moriwaki, Yasue Yamamoto, Toshikazu Suzuki (STARC), Atsushi Kawasumi (Toshiba), Shinji Miyano, Hirofumi Shinohara (STARC), Takayasu Sakurai (Univ. Tokyo) ICD2013-20 |
1Mb SRAM with charge collector circuits for effective use of non-selected bit line charges has been fabricated in 40nm t... [more] |
ICD2013-20 pp.103-108 |
ICD |
2011-04-19 11:20 |
Hyogo |
Kobe University Takigawa Memorial Hall |
0.5-V, 5.5-nsec Access Time, Bulk-CMOS 8T SRAM with Suspended Bit-Line Read Scheme Toshikazu Suzuki, Shinichi Moriwaki, Atsushi Kawasumi, Shinji Miyano, Hirofumi Shinohara (STARC) ICD2011-12 |
A low-voltage high-speed bulk-CMOS 8T SRAM is proposed. A novel 8-transistor (8T) memory cell with a complementary read ... [more] |
ICD2011-12 pp.65-70 |
ICD (Workshop) |
2010-08-16 - 2010-08-18 |
Overseas |
Ho Chi Minh City University of Technology |
Device-modeling techniques for high-frequency circuits operated at over 100GHz Ryuichi Fujimoto (STARC), Kyoya Takano, Mizuki Motoyoshi (Univ. of Tokyo), Uroschanit Yodprasit, Minoru Fujishima (Hiroshima Univ.) |
Device-modeling techniques for high-frequency circuits operated at over 100 GHz is presented. When the MOSFET model incl... [more] |
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ICD, CPM |
2005-09-09 13:50 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Measurement of Inner-chip Variation and Signal Integrity By a 90-nm Large-scale TEG Masaharu Yamamoto (STARC), Yayoi Hayasi, Hitoshi Endo (Hitachi ULSI), Hiroo Masuda (STARC) |
[more] |
CPM2005-103 ICD2005-113 pp.41-46 |
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