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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
ICD |
2007-04-13 09:40 |
Oita |
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[Invited Talk]
A 65 nm Embedded SRAM with Wafer Level Burn-In Mode, Leak-Bit Redundancy and E-trim Fuse for Known Good Die Shigeki Ohbayashi, Makoto Yabuuchi, Kazushi Kono (Renesas Technology), Yuji Oda (Shikino High-Tech), Susumu Imaoka (Renesas Design), Keiichi Usui (Daioh Electric), Toshiaki Yonezu, Takeshi Iwamoto, Koji Nii, Yasumasa Tsukamoto, Masashi Arakawa, Takahiro Uchida, Hiroshi Makino, Koichiro Ishibashi, Hirofumi Shinohara (Renesas Technology) ICD2007-11 |
We propose a Wafer Level Burn-In (WLBI) mode, a leak-bit redundancy and a small, highly reliable Cu E-trim fuse repair s... [more] |
ICD2007-11 pp.59-64 |
ICD, VLD |
2006-03-10 15:35 |
Okinawa |
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An On-chip PVT Control System for Worst-caseless Lower Voltage SoC Design Takayuki Gyohten, Fukashi Morishita (Renesas Technology Corp.), Mako Okamoto (Daioh Electric Corp.), Katsumi Dosaka, Kazutami Arimoto (Renesas Technology Corp.) |
In this paper, we propose on-chip PVT (process, voltage, and temperature) control system for worst-caseless lower voltag... [more] |
VLD2005-132 ICD2005-249 pp.61-66 |
SIP, ICD, IE, IPSJ-SLDM |
2005-10-20 16:30 |
Miyagi |
Ichinobo, Sakunami-Spa |
A Capacitorless Twin-Transistor Random Access Memory (TTRAM) on SOI Takayuki Gyohten, Fukashi Morishita, Hideyuki Noda (Renesas Technology Corp.), Mako Okamoto (Daioh Electric Corp.), Takashi Ipposhi, Shigeto Maegawa, Katsumi Dosaka, Kazutami Arimoto (Renesas Technology Corp.) |
We propose a novel capacitorless twin-transistor random access memory (TTRAM). The 2Mb test device has been fabricated o... [more] |
SIP2005-113 ICD2005-132 IE2005-77 pp.107-112 |
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