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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| VLD | 2016-02-29 14:20 |
Okinawa | Okinawa Seinen Kaikan | Task Allocation Methods based on the Maximum Task Parallelism for Multi-core Systems with the DTTR Scheme Hiroshi Saito (Univ. Aizu), Masashi Imai (Hirosaki Univ.), Tomohiro Yoneda (NII)  VLD2015-113 |
In this paper, we propose a task allocation method for multi-core systems with the Duplication with Temporary Triple Mo... [more] |
VLD2015-113 pp.13-18 |
| MICT, ASN, MoNA (Joint) |
2016-01-29 10:15 |
Kanagawa | Hotel Okada | Analysis of Family Electricity Data Obtained by Smart Meters Kazuki Omomo, Yuta Kobiyama, Qiangfu Zhao (Univ. Aizu) ASN2015-90 |
In this paper, by using electricity data obtained by smart meters located in residential houses, we try to predict futur... [more] | ASN2015-90 pp.63-68 |
| SC | 2015-03-27 15:30 |
Fukushima | Aizu Univ. | Analysis of Power Consumption Data by using Neural Network Kazuki Omomo, Yuya Kaneda, Yuta Kobiyama (Univ. Aizu), Masato Taya (KDDI R&D LABS), Qiangfu Zhao (Univ. Aizu) SC2014-20 |
[more] | SC2014-20 pp.37-41 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2014-11-28 14:45 |
Oita | B-ConPlaza | A Study of Power Optimization for Asynchronous Circuits with Bundled-data Implementation using Mobility of Operations Shunya Hosaka, Hiroshi Saito (Univ. Aizu) VLD2014-104 DC2014-58 |
In this paper, we study a dynamic power optimization method for asynchronous circuits with bundled-data implementation u... [more] | VLD2014-104 DC2014-58 pp.215-220 |
| RCC, ASN, NS, RCS, SR (Joint) |
2014-07-31 10:50 |
Kyoto | Kyoto Terrsa | [Poster Presentation]
Development of a Sensor Network to Measure Snow Depth using Arduino Shunya Hosaka, Yosuke Moriai, Masamitsu Nakajima, Yukihide Kohira, Hiroshi Saito (Univ. Aizu) RCC2014-26 NS2014-46 RCS2014-98 SR2014-27 ASN2014-45 |
To reduce accident, traffic and economic paralysis, and effect for personal life caused by snow, we develop a sensor net... [more] | RCC2014-26 NS2014-46 RCS2014-98 SR2014-27 ASN2014-45 pp.23-28(RCC), pp.1-6(NS), pp.55-60(RCS), pp.43-48(SR), pp.31-36(ASN) |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2011-11-29 13:25 |
Miyazaki | NewWelCity Miyazaki | An Integer Linear Programming based Multiple Task Allocation Method for Fault Tolerance in Network on Chip Hiroshi Saito (Univ. Aizu), Tomohiro Yoneda (NII), Yuichi Nakamura (NEC) VLD2011-77 DC2011-53 |
This paper proposes a multiple task allocation method for given NoC model, task graph, and the number of expected failur... [more] | VLD2011-77 DC2011-53 pp.147-152 |
| RECONF, VLD, CPSY, IPSJ-SLDM [detail] | 2011-01-18 13:30 |
Kanagawa | Keio Univ (Hiyoshi Campus) | [Invited Talk]
Design of Asynchronous Circuits with Bundled-data Implementation on FPGA Hiroshi Saito (Univ. Aizu) VLD2010-107 CPSY2010-62 RECONF2010-76 |
This report initially introduces several researches related to asynchronous circuits and FPGAs. Then, this report propos... [more] | VLD2010-107 CPSY2010-62 RECONF2010-76 pp.157-162 |
| RECONF | 2008-05-22 13:25 |
Fukushima | The University of Aizu | An Implementation of High Precision Floating-point Operation Units on FPGA Naohito Nakasato (Univ. Aizu), Tadashi Ishikawa (KEK) RECONF2008-2 |
Kinds of numerical application programs require high-precision (better than double-precision) floating-point (FP) operat... [more] | RECONF2008-2 pp.7-12 |
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