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Technical Committee on Reconfigurable Systems (RECONF) [schedule] [select]
Chair Minoru Watanabe (Shizuoka Univ.)
Vice Chair Masato Motomura (Hokkaido Univ.), Yuichiro Shibata (Nagasaki Univ.)
Secretary Yutaka Yamada (Toshiba), Yoshiki Yamaguchi (Univ. of Tsukuba)
Assistant Kazuya Tanikagawa (Hiroshima City Univ.), Takefumi Miyoshi (e-trees.Japan)

Conference Date Fri, Sep 18, 2015 09:00 - 16:30
Sat, Sep 19, 2015 09:30 - 11:45
Topics Reconfigurable Systems, etc. 
Conference Place Ehime Univ. 
Address 3, Bunkyo-machi, Matsuyama-shi, Ehime, 790-8577 Japan.
Transportation Guide
Hiroki Nakahara, Ehime University
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Notes on Review This article is a technical report without peer review, and its polished version will be published elsewhere.

Fri, Sep 18 AM 
Chair: Hideharu Amano (Keio Univ.)
09:00 - 10:15
(1) 09:00-09:25 A Design of Basic Functions and Forced Play of TRAX Game for FPGA with High-Level Synthesis Tool RECONF2015-32 Tomonori Izumi, Masashi Ono, Yuuya Hiroe, Lin Meng (Ritsumeikan Univ.)
(2) 09:25-09:50 Trax solver based on machine-learned evaluation function RECONF2015-33 Takuya Nakamichi, Yusuke Sonoda, Takayuki Matsuzaki, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.)
(3) 09:50-10:15 Comparison of machine learning classifiers for HOG-based human detection on an FPGA RECONF2015-34 Masahito Oishi, Yoshiki Hayashida, Ryo Fujita, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.)
Fri, Sep 18 PM 
Chair: Minoru Watanabe (Shizuoka Univ.)
10:30 - 11:20
(4) 10:30-11:20 [Invited Talk]
Game Tree Search Techniques and its Application to Computer Shogi RECONF2015-35
Shogo Takeuchi (Hokkaido Univ.)
Fri, Sep 18 PM 
Chair: Yutaka Yamada (Toshiba)
13:00 - 14:15
(5) 13:00-13:25 A High-level Hardware Design Environment in Python RECONF2015-36 Shinya Takamaeda (NAIST)
(6) 13:25-13:50 Design of Hardware Description Language FSL Based on Object-Oriented/Functional Programming Languages RECONF2015-37 Nobuya Watanabe, Akira Nagoya (Okayama Univ.)
(7) 13:50-14:15 Empirical evaluation of an arithmetic design approach with diversity and redundancy for FPGAs RECONF2015-38 Yudai Shirakura, Kenichi Morimoto (Nagasaki Univ.), Masanori Nobe (MHPS), Masaharu Tanaka (MHI), Yuichiro Shibata, Hidenori Maruta, Fujio Kurokawa (Nagasaki Univ.)
Fri, Sep 18 PM 
Chair: Kazuya Tanigawa (Hiroshima City Univ.)
14:30 - 15:20
(8) 14:30-14:55 ZYNQ CLUSTER FOR CFD PARAMETRIC SURVEY RECONF2015-39 Naru Sugimoto, Hideharu Amano (Keio Univ.)
(9) 14:55-15:20 Overview of the Reconfigurable Virtual Accelerator ReVA RECONF2015-40 Hironori Nakajo, Yuki Oigo (TUAT), Shozo Takeoka (AXE), Masashi Takemoto (BeatCraft), Takefumi Miyoshi (Wasalabo)
Fri, Sep 18 PM 
Chair: Masato Motomura (Hokkaido Univ.)
15:40 - 16:30
(10) 15:40-16:30 [Invited Talk]
Measurements and Optimal Controls of Plant Responses based on a SPA (Speaking Plant Approach) RECONF2015-41
Tetsuo Morimoto (Ehime Univ.)
Sat, Sep 19 AM 
Chair: Takefumi Miyoshi (e-trees.Japan)
09:30 - 10:20
(11) 09:30-09:55 Proposal of small reconfigurable device SePLD using selector RECONF2015-42 Keisuke Yamamoto, Kazuya Tanigawa, Tetsuo Hironaka (Hiroshima City Univ.), Takashi Ishiguro (Taiyo Yuden)
(12) 09:55-10:20 Recovery method of radiation-damaged optically reconfigurable gate arrays RECONF2015-43 Tomoya Akabe, Minoru Watanabe (Shizuoka Univ.)
Sat, Sep 19 AM 
Chair: Yuichiro Shibata (Nagasaki Univ.)
10:30 - 11:45
(13) 10:30-10:55 A Design Method Using Discrete Particle Swarm Optimization for a Deep Neural Network Based on Nested RNS RECONF2015-44 Tatsuya Ogawa, Hiroki Nakahara (Ehime Univ.), Tsutomu Sasao (Meiji Univ.)
(14) 10:55-11:20 An Implementation of AND-EXOR Programmable Logic Arrays Using FPGA primitives RECONF2015-45 Takahiro Shinohara, Hiroki Nakahara (Ehime Univ.), Tsutomu Sasao (Meiji Univ.)
(15) 11:20-11:45 An Approach with DSL for Building up FPGA Primitives RECONF2015-46 Takefumi Miyoshi (WasaLabo/e-tress), Satoshi Funada (e-trees)

Announcement for Speakers
General TalkEach speech will have 20 minutes for presentation and 5 minutes for discussion.

Contact Address and Latest Schedule Information
RECONF Technical Committee on Reconfigurable Systems (RECONF)   [Latest Schedule]
Contact Address Minoru Watanabe,
Shizuoaka University,
e-: tmnipc 

Last modified: 2015-09-10 19:00:51

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