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Technical Committee on Signal Processing (SIP) [schedule] [select]
Chair Ichiro Kuroda
Vice Chair Hitoshi Kiya, Yoji Iiguni
Secretary Osamu Houshuyama, Kiyoshi Nishikawa

Technical Committee on Integrated Circuits and Devices (ICD) [schedule] [select]
Chair Masao Nakaya
Vice Chair Akira Matsuzawa
Secretary Koji Kai, Yoshiharu Aimoto
Assistant Makoto Nagata, Minoru Fujishima

Technical Committee on Image Engineering (IE) [schedule] [select]
Chair Kiyoharu Aizawa
Vice Chair Yoshiyuki Yashima, Toshiaki Fujii
Secretary Hirohisa Jozawa, Shin-ichi Sakaida
Assistant Akira Utsumi, Akio Yoneyama

Special Interest Group on System and LSI Design Methodology (IPSJ-SLDM) [schedule] [select]
Chair Hidetoshi Onodera
Secretary Mitsuhisa Ohnishi, Isaro Utsumi, Kiyoharu Hamaguchi

Conference Date Thu, Oct 26, 2006 09:00 - 17:35
Fri, Oct 27, 2006 09:00 - 16:05
Topics  
Conference Place Ichinobo, Sakunami Spa 
Address Sakunami-Onsen, Aoba-ku, Sendai-shi, 989-3431 Japan.
Transportation Guide http://www.ichinobo.com/sakunami/top.html
Contact
Person
Prof. Masanori Hariyama
022-395-2131

Thu, Oct 26 AM 
09:00 - 10:40
(1) 09:00-09:20 A Cryptographic Communication Technique between IP cores in ULSI Masafumi Hayakawa (Tokyo Denki Univ.), Tsugio Nakamura (Kokusai junior colleg), Hiroshi Kasahara, Narito Fuyutsume, Teruo Tanaka (Tokyo Denki Univ.)
(2) 09:20-09:40 A multi DSP generation system with fractal structured architecture from C language Masanori Nishizawa, Yuichi Shirai, Yoshizo Osumi, Hideto Nishikado (Ritsumeikan Univ.), Toshiyuki Katou (Cadence Design Systems Japan Corp.), Hironori Yamauchi (Ritsumeikan Univ.), Shiro Kobayashi (Asahi Kasei Corp.)
(3) 09:40-10:00 A CDFG architecture suitable for DSP generation and Yuichi Shirai, Masanori Nishizawa, Yoshizo Osumi, Hideto Nishikado (Ritsumeikan Univ.), Toshiyuki Katou (Cadence Design Systems Japan Corp.), Hironori Yamauchi (Ritsumeikan Univ.), Shiro Kobayashi (Asahi Kasei Corp.)
(4) 10:00-10:20 Design of Embedded System for Micro-Capsule-Robot Tsutomu Nishimura, Masatsugu Kobayashi, Takehiro Yoshida, Manabu Takeishi, Tomonori Izumi (Ritsumeikan Univ.), Toshiyuki Katou (Cadence Design Systems Japan Corp.), Hironori Yamauchi (Ritsumeikan Univ.)
(5) 10:20-10:40 Construction and Design of the Communication Module for Micro-Capsule-Robots Kenichi Watanabe, Fumiya Nakamura, Minoru Saito, Takafumi Kado, Notsugu Yamamura, Tomonori Izumi, Hironori Yamauchi (Ritsumeikan Univ.)
Thu, Oct 26 AM 
10:50 - 12:10
(6) 10:50-11:10 Application for Back-End Design of a Highly Collision-Resistive RFID System through High-Level Modeling Approach Yohei Fukumizu, Makoto Nagata (Kobe Univ.), Kazuo Taki (AIL)
(7) 11:10-11:30 A 1V Low Flicker Noise CMOS Filter Haruo Yamakoshi (Osaka Univ.), Hiroshi Yamazaki (Fujitsu lab.), Kenji Taniguchi (Osaka Univ.)
(8) 11:30-11:50 Super parallel SIMD processor with CAM based high-speed pattern matching capability Yutaka Kono, Takeshi Kumaki, Masakatsu Ishizaki, Masaharu Tagami, Tetsushi Koide, Hans Juergen Mattausch (Hiroshima Univ.), Takayuki Gyohten, Hideyuki Noda, Yasuto Kuroda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito (Renesas)
(9) 11:50-12:10 Reducing the Circuit Size of Multipliers Tan Jiunn Jong Edwin, Ryusuke Egawa (GSIS Tohoku University), Jubee Tada (Faculty of Engineering, Yamagata University), Kenichi Suzuki (GSIS Tohoku University), Gensuke Goto (Faculty of Engineering, Yamagata University), Tadao Nakamura (GSIS Tohoku University)
Thu, Oct 26 PM 
13:10 - 15:20
(10) 13:10-13:55 [Invited Talk]
Science and Technology of Everyday Life System: Sensing and Modeling of Everyday Behavior for Children's Injury Prevention
Yoshifumi Nishida, Yoichi Motomura (AIST)
(11) 13:55-14:40 [Invited Talk]
Media Processing LSI Architectures for Automotives
-- Challenges and Future Trends --
Ichiro Kuroda (NEC Electronics)
(12) 14:40-15:00 An alorithm for lane recognition for automobiles Takeshi Taoka, Makoto Manabe, Manabu Kanbayashi, Yosuke Ohnishi, Masahiro Fukui (Ritsumeikan Univ.)
(13) 15:00-15:20 C-based Design and its Optimization for a Speech Recognition System Makoto Saitsuji, Takashi Kambe (Kinki Univ.)
Thu, Oct 26 PM 
15:30 - 17:35
(14) 15:30-16:15 [Invited Talk]
A Cooperative & Concurrent Design Researches Among Algorithm-, Architecture- and Circuit-Layers for Low Power Video Compression SOC
Masahiko Yoshimoto (Kobe Univ.)
(15) 16:15-16:35 A power modeling and optimization algorithm for battery driven systems Hiroyoshi Hirai, Tatsuya Koyagi, Yuichiro Tachikawa, Masahiro Fukui (Ritsumeikan Univ.)
(16) 16:35-16:55 A self-support oriented IP core design method Hiroyuki Hatakenaka (TDU), Tsugio Nakamura (Kokusai Junior College), Hiroshi Kasahara, Narito Fuyutsume, Teruo Tanaka (TDU)
(17) 16:55-17:15 An analysis on a Tradeoff between Reliability and Performance and a Reliabile Cache Architecture for Computer systems Makoto Sugihara (ISIT), Tohru Ishihara, Kazuaki Murakami (Kyushu Univ.)
(18) 17:15-17:35 C-based Design and its Optimization for a Reed-Solomon Decoder Yoshikazu Odajima, Tetsuya Konishi, Takashi Kambe (Kinki Univ.)
Fri, Oct 27 AM 
09:00 - 10:20
(19) 09:00-09:20 On new signatures of logic functions for efficient Boolean matching Yusuke Matsunaga (Kyushu Univ.)
(20) 09:20-09:40 On synthesis algorithm for parallel prefix adders using dynamic programming Taeko Matsunaga (FLEETS), Yusuke Matsunaga (Kyushu Univ.)
(21) 09:40-10:00 A Performance Evaluation of a Statistical Static Timing Analysis Using Gaussian Distribution Wataru Shimoyama, Yusuke Takagi, Shuji Tsukiyama (Chuo Univ.)
(22) 10:00-10:20 A multi objective optimization algorithm for power and ground routing Kenji Kusano, Makoto Terao, Hironobu Ishijima, Yoshiyuki Kawakami, Masahiro Fukui (Ritsumeikan Univ.)
Fri, Oct 27 AM 
10:30 - 12:10
(23) 10:30-10:50 Design Method of System LSI with Three-Dimensional Transistor (FinFET)
-- Reduction of pattern Area --
Shigeyoshi Watanabe, Keisuke Okamoto, Makoto Oya (SIT)
(24) 10:50-11:10 Design method of low-power dual-supply-voltage system LSI taking into account leakage current of MOSFET Shigeyoshi Watanabe, Masaki Kanai, Akira Nagasawa, Satoshi Hanami, Manabu Kobayashi, Toshinori Takabatake (SIT)
(25) 11:10-11:30 High-Performance Asynchronous Data-Transfer VLSI Based on Multiple-Valued Dual-Rail Encoding Tomohiro Takahashi, Kazuyasu Mizusawa, Takahiro Hanyu (Tohoku Univ.)
(26) 11:30-11:50 Reconfigurable Stacked Memory System for Parallel Image Processing Using Three-Dimensional LSI Technology Daijiro Amano, Takeaki Sugimura, Yuta Konishi, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi (Tohoku Univ.)
(27) 11:50-12:10 Design of parallel A/D Converter with Variation Correction for Parallel Image Processing system using Three-Dimensional Integration Technology Yuta Konishi, Takeaki Sugimura, Daijirou Amano, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi (Tohoku Univ.)
Fri, Oct 27 PM 
13:10 - 14:35
(28) 13:10-13:55 [Invited Talk]
General synchronous circuits using global clock
-- design methodologies, tools, and prospects --
Atsushi Takahashi (Tokyo Inst. of Tech.)
(29) 13:55-14:15 Pixel-wise Motion Estimation of Fast Moving Objects based on Multiple Block-wise Motion Estimations Kyota Aoki, Yuji Ino, Masashi Nobe (Utsunomiya Univ.)
(30) 14:15-14:35 Coarse to fine template matching system with complex hardware and software Masatoshi Yokokawa, Rika Sato, Ichiro Sudo, Tomomi Yuno, Kenji Kudo, Masatoshi Sekine (tuat)
Fri, Oct 27 PM 
14:45 - 16:05
(31) 14:45-15:05 IMPULSE NOISE DETECTOR BY USING LAPLACIAN-GAUSSIAN FILTER Noritaka Yamashita, Hiroo Sekiya, Jianming Lu, Takashi Yahagi (Chiba Univ.)
(32) 15:05-15:25 Lossy to Lossless Image Coding Using Allpass Filters Kosuke Ohno, Xi Zhang (UEC)
(33) 15:25-15:45 Development of a polarization imaging device using a patterned polarizer and its application Shinichi Ota (Industrial Technology Institute, Miyagi Prefectural Government), Takayuki Kawashima, Yoshihiko Inoue, Yo Honma, Takashi Sato, Shojiro Kawakami (Photonic Lattice, Inc.), Sei Nagashima, Takafumi Aoki (Tohoku Univ.)
(34) 15:45-16:05 On Learning Algorithm for Feedback Over-Complete BSS Haruo Katou, Kenji Nakayama, Akihiro Hirano (Kanazawa Univ.)

Announcement for Speakers
General TalkEach speech will have 15 minutes for presentation and 5 minutes for discussion.
Invited TalkEach speech will have 35 minutes for presentation and 10 minutes for discussion.

Contact Address and Latest Schedule Information
SIP Technical Committee on Signal Processing (SIP)   [Latest Schedule]
Contact Address Osamu Hoshuyama (NEC Corporation)
TEL +81-044-431-7515, FAX +81-044-431-7590
E-: ushubqc 
ICD Technical Committee on Integrated Circuits and Devices (ICD)   [Latest Schedule]
Contact Address Yasushi Kai(Matsushita)
Tel:+81-92-832-1865 Fax:FAX:+81-92-832-1885
E- : i-icdmlpac

Yasuaki Hirano(Sharp)
Tel:+81-743-65-5069 Fax:FAX:+81-746-65-2899
E- : asrp 
IE Technical Committee on Image Engineering (IE)   [Latest Schedule]
Contact Address Hirohisa Jozawa(NTT Resonant)
TEL 03-5224-6035
E-: ie-n2006 
IPSJ-SLDM Special Interest Group on System and LSI Design Methodology (IPSJ-SLDM)   [Latest Schedule]
Contact Address  


Last modified: 2006-09-20 10:39:46


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