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Technical Committee on Computer Systems (CPSY) [schedule] [select]
Chair Yasuhiko Nakashima (NAIST)
Vice Chair Koji Nakano (Hiroshima Univ.), Hidetsugu Irie (Univ. of Tokyo)
Secretary Takashi Miyoshi (Fujitsu Labs.), Michihiro Koibuchi (NII)
Assistant Takeshi Ohkawa (Utsunomiya Univ.), Shinya Takameda (Hokkaido Univ.)

Technical Committee on Dependable Computing (DC) [schedule] [select]
Chair Michiko Inoue (NAIST)
Vice Chair Satoshi Fukumoto (Tokyo Metropolitan Univ.)
Secretary Masayoshi Yoshimura (Kyoto Sangyo Univ.), Haruhiko Kaneko (Tokyo Inst. of Tech.)

Technical Committee on Reconfigurable Systems (RECONF) [schedule] [select]
Chair Minoru Watanabe (Shizuoka Univ.)
Vice Chair Masato Motomura (Hokkaido Univ.), Yuichiro Shibata (Nagasaki Univ.)
Secretary Yoshiki Yamaguchi (Univ. of Tsukuba), Kazuya Tanigawa (Hiroshima City Univ.)
Assistant Takefumi Miyoshi (e-trees.Japan), Yuuki Kobayashi (NEC)

Special Interest Group on System Architecture (IPSJ-ARC) [schedule] [select]

Conference Date Mon, May 22, 2017 14:00 - 18:10
Tue, May 23, 2017 09:00 - 18:10
Wed, May 24, 2017 09:00 - 12:30
Topics HotSPA2017: Reconfigurable System, Dependable Computing System, and General Topics 
Conference Place Noboribetsu-Onsen Dai-ichi-Takimoto-Kan 
Address 55, Noboribetsu-Onsencho, Noboribetsu, Hokkaido, 059-0551
Transportation Guide 1h10min from Shin-Chitose Airport by the direct bus, or 15min from JR Noboribetsu Station by a bus or taxi
http://www.takimotokan.co.jp/english/access/
Announcement 22日研究会終了後RECONF研懇親会、23日研究会終了後HotSPA (CPSY/DC/RIS/ARC) 懇親会(両日ともに19:30開始)を予定しております。
本研究会は合宿形式となっており、会場の第一滝本館様のご好意により、参加者向けに大変リーズナブルなプランをご提供いただいております。申込〆切は4月14日です。
懇親会および宿泊の案内はこちら http://sigarc.ipsj.or.jp/hotspa2017-stay/
23日12:45からRECONF研専門委員会を予定しております。ご出席なさる場合には上記の宿泊申込システム中のフォームからご登録頂くか、またはRECONF研担当・本村 (motomura_at_ist_hokudai_ac_jp) までご連絡ください。
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)

Mon, May 22 PM  Neural Network Accelerator
14:00 - 15:00
(1)
RECONF
14:00-14:20 RECONF2017-1
(2)
RECONF
14:20-14:40 RECONF2017-2
(3)
RECONF
14:40-15:00 RECONF2017-3
  15:00-15:10 Break ( 10 min. )
Mon, May 22 PM  Invited Talk 1
15:10 - 15:50
(4) 15:10-15:50 CPSY2017-1 DC2017-1 RECONF2017-4
  15:50-16:00 Break ( 10 min. )
Mon, May 22 PM  Neural Network Application on FPGAs
16:00 - 17:00
(5)
RECONF
16:00-16:20 RECONF2017-5
(6)
RECONF
16:20-16:40 CNN implementation on FPGA with Power of 2 Approximation of Weight RECONF2017-6 Takahiro Utsunomiya, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.)
(7)
RECONF
16:40-17:00 RECONF2017-7
  17:00-17:10 Break ( 10 min. )
Mon, May 22 PM  Reconfigurable LSI
17:10 - 18:10
(8)
RECONF
17:10-17:30 A proposal of Bit Serial Arithmetic Units for Arbitrary Precision RECONF2017-8 Tomonori Miura, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.)
(9)
RECONF
17:30-17:50 Radiation tolerance of a holographic memory for optically reconfigurable gate arrays RECONF2017-9 Yoshizumi Ito, Minoru Watanabe (Shizuoka Univ.), Akifumi Ogiwara (Kobe City College of Tech.)
(10)
RECONF
17:50-18:10 RECONF2017-10
Tue, May 23 AM  Image Processing Application on FPGAs
09:00 - 10:00
(11)
RECONF
09:00-09:20 RECONF2017-11
(12)
RECONF
09:20-09:40 RECONF2017-12 Keisuke Takano, Akira Uejima, Ryo Ozaki, Masaki Kohata (Okayama Univ. of Science)
(13)
RECONF
09:40-10:00 RECONF2017-13
  10:00-10:15 Break ( 15 min. )
Tue, May 23 AM  Algorithm and Reconfigurable Device
10:15 - 11:15
(14)
RECONF
10:15-10:35 RECONF2017-14
(15)
RECONF
10:35-10:55 RECONF2017-15
(16)
RECONF
10:55-11:15 Power Optimization for Pipelined CGRA with Intger Linear Program RECONF2017-16 Takuya Kojima, Naoki Ando, Hayate Okuhara, Ng.Doan Anh Vu, Hideharu Amano (Keio Univ.)
  11:15-11:30 Break ( 15 min. )
Tue, May 23 AM  FPGA Application and Acceleration System
11:30 - 12:30
(17)
RECONF
11:30-11:50 RECONF2017-17
(18)
RECONF
11:50-12:10 RECONF2017-18
(19)
RECONF
12:10-12:30 FPGA and DPDK-Based Communication Acceleration Methods for Parameter Servers RECONF2017-19 Kazumasa Kishiki, Korechika Tamura, Hiroki Matsutani (Keio Univ.)
  12:30-14:00 Break ( 90 min. )
Tue, May 23 PM  Light Application
14:00 - 15:00
(20)
RECONF
14:00-14:20 RECONF2017-20
(21)
CPSY
14:20-14:40 A Compact Low-Latency Systematic Successive Cancellation Polar Decoder for Visible Light Communication Systems CPSY2017-2 DC2017-2 Duc Phuc Nguyen, Dinh Dung Le, Thi Hong Tran, Takashi Nakada, Yasuhiko Nakashima (NAIST)
(22)
CPSY
14:40-15:00 A prototype of Dimmable Visible Light Communication System on FPGA CPSY2017-3 DC2017-3 Dinh Dung Le, Duc Phuc Nguyen, Thi Hong Tran, Yasuhiko Nakashima (NAIST), Son Kiet Nguyen, Huu Thuan Huynh (HCMUS)
  15:00-15:10 Break ( 10 min. )
Tue, May 23 PM  Invited Talk 2
15:10 - 15:50
(23) 15:10-15:50 CPSY2017-4 DC2017-4 RECONF2017-21
  15:50-16:00 Break ( 10 min. )
Tue, May 23 PM  Bud Flush Architecture
16:00 - 17:00
(24)
CPSY
16:00-16:20 CPSY2017-5 DC2017-5
(25)
CPSY
16:20-16:40 Hisakazu Fukuoka, Ryusuke Yamano, Yasuhiko Nakashima (NAIST)
(26)
CPSY
16:40-17:00 CPSY2017-6 DC2017-6 ()
  17:00-17:10 Break ( 10 min. )
Tue, May 23 PM  Algorithm
17:10 - 18:10
(27)
CPSY
17:10-17:30 A Case for HTM-supported Concurrent B-trees CPSY2017-7 DC2017-7 Kousei Sai, Jun Miyazaki (Tokyo Inst. of Tech.)
(28)
CPSY
17:30-17:50 CPSY2017-8 DC2017-8
(29)
CPSY
17:50-18:10 Optimization of the aggregation process in Particle-In-Cell method using OpenCL CPSY2017-9 DC2017-9 Hiroyuki Noda, Ryotaro Sakai (Keio Univ.), Takaaki Miyajima, Naoyuki Fujita (JAXA), Hideharu Amano (Keio Univ.)
Wed, May 24 AM  Distributed System
09:00 - 10:00
(30)
CPSY
09:00-09:20 Deduplication Estimation System for Large Scale Enterprise Storage CPSY2017-10 DC2017-10 Kazuei Hironaka, Tomohiro Kawaguchi (Hitachi)
(31) 09:20-09:40 パケット処理キャッシュにおける送信元IPアドレスに着目したミス削減手法に関する初期検討
○八巻 隼人、愛甲 達也、三輪 忍、本多 弘樹(電気通信大学)
(32)
CPSY
09:40-10:00 A Concept for Distributed Neural Network on Edge Computing CPSY2017-11 DC2017-11 Yuria Hiraga, Takamasa Mitani, Hisakazu Fukuoka, Takashi Nakada, Yasuhiko Nakashima (NAIST)
  10:00-10:15 Break ( 15 min. )
Wed, May 24 AM  Dependable Computing
10:15 - 11:15
(33)
DC
10:15-10:35 Deterministic Path Delay Measurement Using Short Cycle Test Pattern for Aging Detection CPSY2017-12 DC2017-12 Kentaro Kato, Umi Mori (NIT)
(34)
DC
10:35-10:55 On Implementation of the Light-Weight MPAR protocol in NS2 CPSY2017-13 DC2017-13 Yusuke Sugiura, Kazuya Sakai, Satoshi Fukumoto (Tokyo Metropolitan Univ.)
(35)
DC
10:55-11:15 Study on Application System Anomaly Detection Method Based on Correlation Analysis of Communication Packets Sampling CPSY2017-14 DC2017-14 Masahiko Yasui, Masayuki Sakata, Keisuke Hatasaki, Keitaro Uehara, Takaya Ide, Hitoshi Yabusaki (Hitachi)
  11:15-11:30 Break ( 15 min. )
Wed, May 24 AM  Microarchitecture
11:30 - 12:30
(36) 11:30-11:50 低電力モードを備えるプロセッサとモード切り替えアルゴリズムによる電力効率の向上
○塩谷 亮太、地代 康政、出岡 宏二郎(名古屋大学)、五島 正裕(国立情報学研究所)、安藤 秀樹(名古屋大学)
(37) 11:50-12:10 動的タイム・ボローイングを可能にするクロッキング方式のスカラ・プロセッサへの適用
○神保 潮(総合研究大学院大学)、五島 正裕(国立情報学研究所)
(38)
DC
12:10-12:30 Note on Evaluation Scheme for Redundant CPU Cache Considering Soft Error Resilience and Performance CPSY2017-15 DC2017-15 Naoya Kawashima, Masayuki Arai (Nihon Univ.)

Announcement for Speakers
General TalkEach speech will have 15 minutes for presentation and 5 minutes for discussion.
Invited TalkEach speech will have 35 minutes for presentation and 5 minutes for discussion.

Contact Address and Latest Schedule Information
CPSY Technical Committee on Computer Systems (CPSY)   [Latest Schedule]
Contact Address Takashi Miyoshi (FUJITSU)
TEL +81-44-754-2931, FAX +81-44-754-2672
E-:

CPSY WEB
http://www.ieice.or.jp/iss/cpsy/jpn/ 
DC Technical Committee on Dependable Computing (DC)   [Latest Schedule]
Contact Address  
RECONF Technical Committee on Reconfigurable Systems (RECONF)   [Latest Schedule]
Contact Address Tetsuo HIRONAKA
Hiroshima City University,
e-: -cu
Tel: +81-82-830-1566
Fax: +81-82-830-1792 
IPSJ-ARC Special Interest Group on System Architecture (IPSJ-ARC)   [Latest Schedule]
Contact Address  


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