IEICE Technical Committee Submission System
Advance Program
Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top  Go Back   Prev DC Conf / Next DC Conf [HTML] / [HTML(simple)] / [TEXT]  [Japanese] / [English] 


Technical Committee on Dependable Computing (DC) [schedule] [select]
Chair Seiji Kajihara (Kyushu Inst. of Tech.)
Vice Chair Nobuyasu Kanekawa (Hitachi)
Secretary Tomohiro Nakamura (Hitachi), Tatsuhiro Tsuthiya (Osaka Univ.)

Conference Date Mon, Feb 10, 2014 09:00 - 17:30
Topics VLSI Design and Test, etc. 
Conference Place  
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)

Mon, Feb 10 AM 
09:00 - 10:15
(1) 09:00-09:25 Module Coupling Overhead Aware Scan Chain Construction DC2013-79 Meguru Komatsu, Hiroshi Iwata, Ken'ichi Yamaguchi (NNCT)
(2) 09:25-09:50 On Feasibility of Delay Detection by Time-to-Digital Converter Embedded in Boundary-Scan DC2013-80 Hiroki Sakurai, Hiroyuki Yotsuyanagi, Masaki Hashizume (Univ. of Tokushima)
(3) 09:50-10:15 A DFT Method to Achieve 100% Fault Coverage for QDI Asynchronous Circuit DC2013-81 Sanae Mizutani, Hiroshi Iwata, Ken'ichi Yamaguchi (NNCT)
  10:15-10:30 Break ( 15 min. )
Mon, Feb 10 AM 
10:30 - 11:20
(4) 10:30-10:55 Suitable Power-Aware Test Pattern Ordering for Deterministic Circular Self Test Path DC2013-82 Ryo Ogawa, Hiroshi Iwata, Ken'ichi Yamaguchi (NNCT)
(5) 10:55-11:20 A Low Power Dissipation Oriented Don't Care Filling Method Using SAT DC2013-83 Yoshiyasu Takahashi, Hiroshi Yamazaki, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyushu Univ)
  11:20-11:35 Break ( 15 min. )
Mon, Feb 10 AM 
11:35 - 12:50
(6) 11:35-12:00 Note on Weighted Fault Coverage Considering Multiple Defect Sizes and Via Open DC2013-84 Yuta Nakayama (Tokyo Metro. Univ.), Masayuki Arai (Nihon Univ.), Hongbo Shi, Kazuhiko Iwasaki (Tokyo Metro. Univ.)
(7) 12:00-12:25 Device-parameter Estimation Using Framework of Fmax Testing DC2013-85 Michihiro Shintani, Takashi Sato (Kyoto Univ.)
(8) 12:25-12:50 An Efficient Test Pattern Generator based on Mersenne Twister algorithm DC2013-86 Sayaka Satonaka, Hiroshi Iwata, Ken'ichi Yamaguchi (NNCT)
  12:50-14:15 Break ( 85 min. )
Mon, Feb 10 PM 
14:15 - 14:55
(9) 14:15-14:55  
  14:55-15:10 Break ( 15 min. )
Mon, Feb 10 PM 
15:10 - 16:25
(10) 15:10-15:35 A reduction method of shift data volume on BAST DC2013-87 Marika Tanaka, Hiroshi Yamazaki, Toshinori Hosokawa (Nihon Univ), Masayoshi Yoshimura (Kyushu Univ), Masayuki Arai (Nihon Univ)
(11) 15:35-16:00 Test Data Reduction Method for BIST-Aided Scan Test by Controlling Scan Shift and Partial Reset of Inverter Code DC2013-88 Ryota Mori, Hiroyuki Yotsuyanagi, Masaki Hashizume (Univ. of Tokushima)
(12) 16:00-16:25 A Low Power Consumption Oriented Test Generation Method for Transition Faults Using Multi Cycle Capture Test Generation DC2013-89 Hiroshi Yamazaki, Yuto Kawatsure, Jun Nishimaki, Atsushi Hirai, Toshinori Hosokawa (Nihon Univ), Masayoshi Yoshimura (Kyushu Univ), Koji Yamazaki (Meiji Univ)
  16:25-16:40 Break ( 15 min. )
Mon, Feb 10 PM 
16:40 - 17:30
(13) 16:40-17:05 An Implementation of Fault Tolerant Systems with Mutual Reconfiguration Based on Dual-FPGA Architecture DC2013-90 Takuma Mori, Shoichi Ohmoto, Tsuyoshi Iwagaki, Hideyuki Ichihara, Tomoo Inoue (Hiroshima City Univ.)
(14) 17:05-17:30 Detection of Wormhole Attack in Wireless Sensor Network with XMesh Protocol DC2013-91 Takashi Minohara, Aoi Yoshii (Takushoku Univ.)

Announcement for Speakers
General TalkEach speech will have 20 minutes for presentation and 5 minutes for discussion.
Special TalkEach speech will have 30 minutes for presentation and 10 minutes for discussion.

Contact Address and Latest Schedule Information
DC Technical Committee on Dependable Computing (DC)   [Latest Schedule]
Contact Address  


Last modified: 2013-12-20 20:27:53


Notification: Mail addresses are partially hidden against SPAM.

[Download Paper's Information (in Japanese)] <-- Press download button after click here.
 
[Cover and Index of IEICE Technical Report by Issue]
 

[Presentation and Participation FAQ] (in Japanese)
 

[Return to DC Schedule Page]   /  
 
 Go Top  Go Back   Prev DC Conf / Next DC Conf [HTML] / [HTML(simple)] / [TEXT]  [Japanese] / [English] 


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan