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Technical Committee on Circuits and Systems (CAS) [schedule] [select]
Chair Mineo Kaneko
Vice Chair Tetsuro Itakura
Secretary Masahide Abe, Yuichi Nakamura

Technical Committee on Concurrent Systems Technology (CST)
Chair Naoshi Uchihira
Vice Chair Katsu Kii
Secretary Satoshi Taoka, Morikazu Nakamura
Assistant Shingo yamaguchi

Conference Date Mon, Nov 20, 2006 10:15 - 17:50
Tue, Nov 21, 2006 09:25 - 14:45
Topics Graph theory, Petri net, Neural network, etc. 
Conference Place Bunkyo Campus, Nagasaki University 
Address 1-14, Bunkyo-machi, Nagasaki-shi, 852-8521 Japan.
Transportation Guide
Prof. Hiroyuki Takada

Mon, Nov 20 AM 
10:15 - 17:50
(1) 10:15-10:40 Firing Squad Synchronization Algorithm on Communication-restricted Cellular Automata Takashi Yanagihara, Naoki Kamikawa, Hiroshi Umeo (Univ, of Osaka Electro Communication)
(2) 10:40-11:05 An Optimum Time Synchronization Algorithm for Two-Dimensional Arrays Hiroki Uchino, Hiroshi Umeo (OECU)
(3) 11:05-11:30 On Evaluation and Application of PARAdeg of Acyclic Structured Program Nets Tomohiro Takai, Shingo Yamaguchi, Qi-Wei Ge, Minoru Tanaka (Yamaguchi Univ.)
(4) 11:30-11:55 Finding Coefficients for a Firing Count Vector Expanded by T-Invariants and Particular Solutions of P/T Petri Nets Tadashi Matsumoto (Fukui Univ. of Tech.), Seiichiro Moro (Univ. of Fukui), Masahiro Osogami (Fukui Univ. of Tech.)
  11:55-13:10 Lunch Break ( 75 min. )
(5) 13:10-13:35 Finite Wordlength Design for IIR Digital Filters Based on the Modified Least-Square Criterion in the Frequency Domain Masayoshi Nakamoto, Tsuyoshi Yoshiya, Takao Hinamoto (Hiroshima Univ.)
(6) 13:35-14:00 A Study on Scaling Effects in the Design of FIR Filter with CSD Coefficients Yuichi Ozaki, Kenji Suyama (Tokyo DENKI Univ.)
(7) 14:00-14:25 Voice recognition preprocessing circuit by the aural model's making to hardware Toshitaka Nagano, Etsu Sou, Hidehiko Arai, Yuuya Usami, Kazushi Takahashi, Kenji Kudo, Masatoshi Sekine (Tokyo Univi of Agriculture and Technology)
  14:25-14:45 Break ( 20 min. )
(8) 14:45-15:10 Stack Queue Mixed Layout of Bipartite Graph Subdivisions Miki Miyauchi (NTT), Gisaku Nakamura (Tokai Univ.)
(9) 15:10-15:35 Application of a Compaction Method for Rectilinear Drawing of Graphs to Layout Design of Printed Wiring Boards Atsushi Tsuji, Daisuke Takafuji, Satoshi Taoka, Toshimasa Watanabe (Hiroshima Univ.)
(10) 15:35-16:00 Constructing a Steiner Tree of a Rectilinear Graph with Obstracles
-- Enhancement based on Improved Selection of Steiner Candidate Points --
Kazuhiro Egashira, Daisuke Takafuji, Satoshi Taoka, Toshimasa Watanabe (Hiroshima Univ.)
(11) 16:00-16:25 Fast and Sharp Approximation Algorithms for the Maximum Weight Matching Problem of Graphs
-- Enchancing by improved search of weight augmenting paths --
Yasunori Nishikawa, Daisuke Takafuji, Satoshi Taoka, Toshimasa Watanabe (Hiroshima Univ.)
(12) 16:25-16:50 Multi-Terminal Net Routing with Wire Length and Congestion Controls Toshihiko Takahashi, Masahiro Haga (Niigata Univ.)
  16:50-17:10 Break ( 20 min. )
(13) 17:10-17:50 [Invited Talk]
Trend of real-time simulation for vehicle control
Hirotoshi Tonou (FUJITSU TEN)
Tue, Nov 21 AM 
09:25 - 14:45
(14) 09:25-09:50 Computational Evaluation of Heuristic Algorithms for a Share Transfer Problem Toshiyuki Miyamoto, Sadatoshi Kumagai (Osaka Univ.)
(15) 09:50-10:15 Performance Evaluation of Workflows Using Continuous Approximation Kunihiko Hiraishi (JAIST)
(16) 10:15-10:40 A Visual Trace Tool of Graph Algorithms Providing Hierarchical View of Graphs Kazuya Sakamoto, Masahiro Yamauchi (Kinki Univ.), Toshimasa Watanabe (Hiroshima Univ.)
  10:40-11:00 Break ( 20 min. )
(17) 11:00-12:00 [Invited Talk]
Dynamic Re-configurable Architecture PCA for Stream Processing
Kiyoshi Oguri (Nagasaki Univ.)
  12:00-13:30 Lunch Break ( 90 min. )
(18) 13:30-13:55 Solution Space Reduction of Sequence-Pair using Quadratic Wire Length Minimization Yuuki Yano, Mineo Kaneko (JAIST)
(19) 13:55-14:20 An Improvement Method of the Budget Free Design Method for 100M Tr. Circuits Yuichi Nakamura (NEC), Mitsuru Tagata (HNES)
(20) 14:20-14:45 The Complexity of Three-Dimensional Channel Routing Satoshi Tayu, Shuichi Ueno (Tokyo Inst. of Tech.)

Contact Address and Latest Schedule Information
CAS Technical Committee on Circuits and Systems (CAS)   [Latest Schedule]
Contact Address  
CST Technical Committee on Concurrent Systems Technology (CST)   
Contact Address Satoshi TAOKA(Infomation Engineering, Graduate School of Engineering, Hiroshima University)
TEL 082-424-7666, FAX 082-422-7028

Last modified: 2006-10-26 11:37:47

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