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Technical Committee on Neurocomputing (NC) [schedule] [select]
Chair Hideki Asoh
Vice Chair Hiroaki Gomi
Secretary Noboru Murata, Hiroshi Wakuya
Assistant Toru Aonishi, Hiroshi Kage

Conference Date Fri, Nov 10, 2006 14:00 - 17:10
Sat, Nov 11, 2006 10:00 - 15:30
Topics Neuro-Hardware, and General 
Conference Place Seminar Room, Building No.6, Faculty of Science and Engineering, Saga University 
Address Honjo-machi, Saga 840-8502, Japan
Transportation Guide http://www.saga-u.ac.jp/english/accessmap.pdf
Contact
Person
Dr. Hiroshi Wakuya
0952-28-8636
Sponsors This conference is co-sponsored by the IEEE Computational Intelligence Society Japan Chapter and the Japanese Neural Network Society.

Fri, Nov 10 PM  General
14:00 - 15:40
(1) 14:00-14:25 On-line training controller which controls inverted pendulum
-- An analysis of reversalization of control command --
Yoichiro Sankai, Hiroshi Wakuya, Yuzuru Morita (Saga Univ.)
(2) 14:25-14:50 Virtual Lerning System for a Bipedal Robot. Hiromasa Onishi, Hirokazu Yokoi (KIT)
(3) 14:50-15:15 Mutual inhibition of the pilocarpine-induced epileptiform activity in hippocampus and entorhinal cortex in rat slice preparations Shunsuke Sakaguchi, Takeshi Yamakawa, Kiyohisa Natsume (KIT)
(4) 15:15-15:40 The frequency of carbachol-induced β oscillation is increased by the activation of adrenergic receptor in rat hippocampal slices Masafumi Nakano, Jun Arai, Kiyohisa Natsume (KIT)
  15:40-15:55 Break ( 15 min. )
Fri, Nov 10 PM  Neuro-Hardware
15:55 - 17:10
(5) 15:55-16:20 Genetic Algorithm Hardware Using New Selection Circuit Based on Rough Comparison Method Tomokazu Hiratsuka, Hakaru Tamukoh, Keiichi Horio, Takeshi Yamakawa (Kyushu Inst. of Tech.)
(6) 16:20-16:45 A CMOS Pixel-parallel Anisotropic Diffusion Circuit for Subjective Contour Generation Using Merged Analog-Digital Architecture Youngjae Kim, Takashi Morie (KIT)
(7) 16:45-17:10 Vector Quantization Algorithm for Hardware Implementation Shigeki Matsubara, Hiroomi Hikawa (Oita Univ.)
Sat, Nov 11 AM  Neuro-Hardware
10:00 - 11:40
(8) 10:00-10:25 Investigation of a switched resistor network to develop a silicon retina Seiji Kameda, Shosuke Morimoto, Atsushi Iwata (Hiroshima Univ.)
(9) 10:25-10:50 Pulse-type Hardware Model of an Input Region in a Visual Cortex Takaaki Iwamoto, Yoshifumi Sekine (Nihon Univ.)
(10) 10:50-11:15 A VLSI-Implementation-Friendly Ego-Motion Detection Algorithem Based on Edge-Histogram Matching Jia Hao, Tadashi Shibata (Univ. of Tokyo)
(11) 11:15-11:40 K-means VLSI Processor and its application to autonomous area segregation in images Shigetaka Morikawa, Kiyoto Ito, Tadashi Shibata (Tokyo Univ.)
  11:40-13:00 Lunch Break ( 80 min. )
Sat, Nov 11 PM  Neuro-Hardware
13:00 - 15:30
(12) 13:00-14:00 [Invited Talk]
A VLSI brain processor system mimicking the processing in mind
-- Building real-time visual perception systems --
Tadashi Shibata (Univ. of Tokyo)
  14:00-14:15 Break ( 15 min. )
(13) 14:15-14:40 Bifurcation phenomena from an artificial spiking neuron with piecewise-linear base signal Toshimitsu Ohtani, Toshimichi Saito, Hiroyuki Torikai (Hosei Univ.)
(14) 14:40-15:05 An approach toward learning algorithm for Digital Spiking Neuron Hiroyuki Torikai, Toshimichi Saito (Hosei Univ.)
(15) 15:05-15:30 Research on Four Valued T-Gate with νMOSFETs Yoshikazu Ishimaru, Hiroyasu Kondou (Saga Univ), Yohei Ishikawa (Ariake NCT), Sumio Fukai (Saga Univ)

Contact Address and Latest Schedule Information
NC Technical Committee on Neurocomputing (NC)   [Latest Schedule]
Contact Address Hiroshi Wakuya (Saga University)
Phone:0952-28-8636
E-:ee-u 
Announcement Cooperated with Japanese Neural Network Society


Last modified: 2006-09-26 22:47:29


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