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Technical Committee on Reconfigurable Systems (RECONF) [schedule] [select]
Chair Tetsuo Hironaka (Hiroshima City Univ.)
Vice Chair Minoru Watanabe (Shizuoka Univ.), Masato Motomura (Hokkaido Univ.)
Secretary Yutaka Yamada (Toshiba), Yoshiki Yamaguchi (Univ. of Tsukuba)
Assistant Kazuya Tanikagawa (Hiroshima City Univ.)

Conference Date Wed, Jun 11, 2014 13:30 - 17:50
Thu, Jun 12, 2014 09:00 - 17:15
Topics Reconfigurable Systems, etc. 
Conference Place Sakura Hall, Katahira Campus、Tohoku University 
Address 2-1-1 Katahira, Aoba-ku, Sendai, 980-8577, Japan
Transportation Guide http://www.isheart.org/HEART2014/venue.html
Contact
Person
Takeshi Okawa
Sponsors The Graduate School of Information Sciences, Tohoku University
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (No. 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)

Wed, Jun 11 PM  FPGA Design Contest
Chair: Yasunori Osana
13:30 - 16:50
(1) 13:30-16:50 HEART 2014 Design Contest: Blokus Duo
Please refer to the website for more information:
http://lut.eee.u-ryukyu.ac.jp/dc14/index.html
  16:50-17:00 Break ( 10 min. )
Wed, Jun 11 PM  Invited talk
Chair: Tetsuo Hironaka (Hiroshima City U.)
17:00 - 17:50
(1) 17:00-17:50 [Invited Talk]
Prospects of Custom Accelerators for Large-Scale Computation
-- Perspectives of Applications, Architectures, and Circuits --
RECONF2014-1
Masanori Hariyama (Tohoku Univ.)
Thu, Jun 12 AM  Application
Chair: Kenji Kanazawa (U. Tsukuba)
09:00 - 10:15
(2) 09:00-09:25 A Dynamic Reconfigurable Mixed Analog-Digital Filter
-- Applied to an Acoustic Diagnostic --
RECONF2014-2
Hiroki Nakahara, Hideki Yoshida (Kagoshima Univ.), Tsutomu Sasao (Meiji Univ.), Renji Mikami (Mikami Consul.)
(3) 09:25-09:50 Optimized HOG for database system RECONF2014-3 Mao Hatto, Takaaki Miyajima, Hiroki Matsutani, Hideharu Amano (Keio Univ.)
(4) 09:50-10:15 Highly-Parallel FPGA Accelerator for DNA Sequence Alignment Using the Burrows-Wheeler Algorithm RECONF2014-4 Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama (Tohoku Univ.)
  10:15-10:25 Break ( 10 min. )
Thu, Jun 12 PM  Architecture and performance assessment study
Chair: Takeshi Ohkawa (Utsunomiya U.)
10:25 - 12:05
(5) 10:25-10:50 Improvement of Implementability by Exploring Routing Architecture in Flex Power FPGA RECONF2014-5 Masakazu Hioki, Toshihiro Sekigawa, Tadashi Nakagawa, Yasuhiro Ogasahara (AIST), Toshiyuki Tsutsumi (Meiji Univ.), Hanpei Koike (AIST)
(6) 10:50-11:15 An Asynchronous High-Performance FPGA Based on LEDR/Four-Phase-Dual-Rail Hybrid Architecture RECONF2014-6 Yoshiya Komatsu, Masanori Hariyama, Michitaka Kameyama (Tohoku Univ.)
(7) 11:15-11:40 Three-dimensional FPGA Structure using High-speed Serial Communication RECONF2014-7 Takuya Kajiwara, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.)
(8) 11:40-12:05 Body bias control of low-power reconfigurable accelerator CMA-SOTB RECONF2014-8 Yu Fujita, Hongliang Su, Hideharu Amano (Keio univ.)
  12:05-13:45 Break ( 100 min. )
Thu, Jun 12 AM  High-level synthesis and hardware-software codesign
Chair: Yoshiki Yamaguchi (U. Tsukuba)
13:45 - 15:25
(9) 13:45-14:10 A Design of Blokus Player Algorithm with Impulse High-Level Synthesis Tools RECONF2014-9 Ryo Kawai, Tomonori Izumi (Ritsumeikan Univ.)
(10) 14:10-14:35 Zyndroid: HW/SW Coprocessing Platform for Android Applications RECONF2014-10 Susumu Mashimo, Morihiro Kuga, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.)
(11) 14:35-15:00 A Memory Profiling Framework for Stencil Computation on an FPGA Accelerator with High Level Synthesis RECONF2014-11 Koji Okina, Rie Soejima, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.)
(12) 15:00-15:25 A Study on Accelerating Image Recognition Processing by HW/SW Cooperative Processing on an FPGA for Automatic Watch System on Navigation RECONF2014-12 Takeshi Ohkawa (Utsunomiya Univ.), Yohei Matsumoto (Tokyo Marine Univ.), Daichi Uetake, Kanemitsu Ootsu, Takashi Yokota (Utsunomiya Univ.)
  15:25-15:35 Break ( 10 min. )
Thu, Jun 12 PM  Acceleration and power performance
Chair: Kazuya Tanigawa(Hiroshima City U.)
15:35 - 17:15
(13) 15:35-16:00 Implementation of a RISC Processor with a Complex Instruction Accelerator
-- Return to a CISC --
RECONF2014-13
Ryota Suzuki (Tokyo Univ. of Agriculture and Tech.), Takefumi Miyoshi (e-trees), Hironori Nakajo (Tokyo Univ. of Agriculture and Tech.)
(14) 16:00-16:25 FPGA Acceleration of SAT/MaxSAT Solving using Variable-way Set Associative Cache RECONF2014-14 Kenji Kanazawa, Tsutomu Maruyama (Univ. of Tsukuba)
(15) 16:25-16:50 Design of an FPGA-Based Accelerator for Shortest-Path Search over Large-Scale Graphs RECONF2014-15 Yasuhiro Takei, Masanori Hariyama, Michitaka Kameyama (Tohoku Univ.)
(16) 16:50-17:15 A software processor core with variable parallel execution RECONF2014-16 Takuya Nagashima, Shoji Tanabe, Yoshiki Yamaguchi (Univ. of Tsukuba)

Announcement for Speakers
General TalkEach speech will have 20 minutes for presentation and 5 minutes for discussion.
Invited TalkEach speech will have 50 minutes for presentation and 10 minutes for discussion.

Contact Address and Latest Schedule Information
RECONF Technical Committee on Reconfigurable Systems (RECONF)   [Latest Schedule]
Contact Address Yoshiki YAMAGUCHI
University of Tsukuba, Japan
E-: ba 


Last modified: 2014-05-19 13:00:39


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