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|
| Chair |
|
Tomohiro Yoneda (NII) |
| Vice Chair |
|
Seiji Kajihara (Kyushu Inst. of Tech.) |
| Secretary |
|
Masato Kitagami (Chiba Univ.), Michinobu Nakao (Renesas) |
|
| Conference Date |
Fri, Dec 10, 2010 13:30 - 17:40 |
| Topics |
Safety, etc. |
| Conference Place |
|
Copyright
and
reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
Fri, Dec 10 PM
13:30 - 15:00 |
| (1) |
13:30-14:00 |
Magneticfield measurements in case of international standards for railway  DC2010-51 |
Toshihiro Takeuchi, Korefumi Tashiro, Jun Yoshinaga, Tomonori Hasegawa, Takeshi Mizuma (NTSEL) |
| (2) |
14:00-14:30 |
A Study on Dependable Data Logger for Inline Production Management DC2010-52 |
Masaya Ohta (Nihon Univ.), Kazumi Sakamaki, Yasuaki Kaneda, Yasuharu Irizuki (TIRI), Masanobu Yamazaki, Kazuhiko Horigome (K.T. Mfg. Co., Ltd), Hiroshi Mochizuki, Hideo Nakamura (Nihon Univ.) |
| (3) |
14:30-15:00 |
A class of 1 level error correcting code for multilevel cell flash memories DC2010-53 |
Kazuya Sato, Masato Kitakami (Chiba Univ.) |
| |
15:00-15:10 |
Break ( 10 min. ) |
Fri, Dec 10 PM
15:10 - 17:40 |
| (4) |
15:10-15:40 |
A Study on Fault Tolerance of Structured P2P Network DC2010-54 |
Satoshi Fukumoto, Yumeto Terada, Masayuki Arai (Tokyo Metropolitan Univ.) |
| (5) |
15:40-16:10 |
Design and Implementation of a Distributed Control System for Flexible System Reconfiguration DC2010-55 |
Yuta Takeda, Hiroshi Mochizuki, Hideo Nakamura (Nihon Univ.) |
| (6) |
16:10-16:40 |
Research of Highly Reliable Fail-safe CPU DC2010-56 |
Yasuo Ogawa, Akihisa Asami (Nippon Signal), Hideo Nakamura (Nihon Univ.) |
| (7) |
16:40-17:10 |
Verification of Automatic Block System for Single Line by Model Checking DC2010-57 |
Natsuki Terada (RTRI) |
| (8) |
17:10-17:40 |
A Study to reduce Software Requirements Specification Errors with Checklists for the Railway Signalling Systems DC2010-58 |
Koji Iwata, Ikuo Watanabe (RTRI) |
| Announcement for Speakers |
| General Talk | Each speech will have 20 minutes for presentation and 10 minutes for discussion. |
| Contact Address and Latest Schedule Information |
| DC |
Technical Committee on Dependable Computing (DC) [Latest Schedule]
|
| Contact Address |
Masato Kitakami
Graduate School of Advanced Integration Science,
Chiba University
1-33 Yayoi-cho Inage-ku, Chiba 263-8522 JAPAN
TEL/FAX +43.290.3039
E- :    f ulty  ba-u |
Last modified: 2010-10-22 08:44:54
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