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Search Results: Keywords 'from:2012-01-19 to:2012-01-19'
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| ICD, IPSJ-ARC | 2012-01-19 11:00 |
Tokyo | Design of a High-Density and Low-Power Nonvolatile Logic Element Using MTJ Devices Daisuke Suzuki, Takahiro Hanyu (Tohoku Univ.)  ICD2011-135 |
[more] | ICD2011-135 pp.15-19 |
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| ICD, IPSJ-ARC | 2012-01-19 11:40 |
Tokyo | [Invited Talk]
Low Power Technologies and Scaling Law Toward Future Koichiro Ishibashi (UEC-Tokyo) ICD2011-136 |
LSI density has been increasing by Moore's law, and performance of LSI has also been increasing with decreasing power di... [more] | ICD2011-136 pp.21-22 |
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| ICD, IPSJ-ARC | 2012-01-19 14:20 |
Tokyo | [Invited Talk]
Issues and Prospects of Nonvolatile Memories for Realizing Normally-Off Processors
-- How to solve the issues "Dilemma of Nonvolatile Logics -- Shinobu Fujita, Keiko Abe, Kumiko Nomura, Hiroaki Yoda (Toshiba) ICD2011-137 |
[more] | ICD2011-137 pp.27-31 |
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| ICD, IPSJ-ARC | 2012-01-19 16:20 |
Tokyo | [Panel Discussion]
Challenges and Opportunities for Normally-Off Computing Hiroshi Nakamura (Univ. of Tokyo) ICD2011-138 |
Computer systems are utilized almost everywhere in the world and further contribution of these systems to our society is... [more] | ICD2011-138 p.35 |
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| ICD, IPSJ-ARC | 2012-01-20 10:30 |
Tokyo | Associativity-Variable Cache to Adaptively Expand Operating Voltage Margin Jinwook Jung, Yohei Nakata, Shunsuke Okumura, Hiroshi Kawaguchi (Kobe Univ.), Masahiko Yoshimoto (JST) ICD2011-139 |
This paper presents a dependable cache memory for which associativity can be reconfigured dynamically. The proposed asso... [more] | ICD2011-139 pp.55-60 |
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| ICD, IPSJ-ARC | 2012-01-20 11:10 |
Tokyo | Design Technology of stacked Type Chain PRAM Sho Kato, Shigeyoshi Watanabe (SIT) ICD2011-140 |
[more] | ICD2011-140 pp.61-66 |
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| ICD, IPSJ-ARC | 2012-01-20 13:10 |
Tokyo | [Invited Talk]
Overview of High Performance Digital Processor Technology Hiroo Hayashi (Toshiba Corp.) ICD2011-141 |
Evolution of high-performance digital technology has been ongoing. The author surveys the technology trends of high-per... [more] | ICD2011-141 pp.73-76 |
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| ICD, IPSJ-ARC | 2012-01-20 15:10 |
Tokyo | An Evaluation of An FPGA Based on Synchronous/Asynchronous Hybrid Architecture Yoshiya Komatsu, Masanori Hariyama, Shota Ishihara, Ryoto Tsuchiya, Michitaka Kameyama (Tohoku Univ.) ICD2011-142 |
This paper presents an FPGA architecture that combines synchronous and asynchronous architectures. Datapath components s... [more] | ICD2011-142 pp.93-96 |
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| ICD, IPSJ-ARC | 2012-01-20 15:50 |
Tokyo | A 115mW 1Gbps QC-LDPC Decoder ASIC for WiMAX in 65nm CMOS Xiao Peng, Zhixiang Chen, Xiongxin Zhao, Dajiang Zhou, Satoshi Goto (Waseda Univ.) ICD2011-143 |
[more] | ICD2011-143 pp.97-101 |
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| ICD, IPSJ-ARC | 2012-01-20 16:20 |
Tokyo | A 75-Variable MIQP Solver Processor for Real-Time Robot Control Masanori Nishino, Hiroki Noguchi, Yusuke Shimai, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.) ICD2011-144 |
This paper describes a low-power eight-core Mixed Integer Quadric Programming (MIQP) solver processor VLSI for real-time... [more] | ICD2011-144 pp.103-107 |
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