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Technical Committee on VLSI Design Technologies (VLD) (Searched in: 2008)
Search Results: Keywords 'from:2008-11-17 to:2008-11-17'
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2008-11-17 13:00 |
Fukuoka | Kitakyushu Science and Research Park | On Improving Transition Fault Coverage of Stuck-at Fault Tests Using Don't Care Identification Technique Kazumitsu Hamasaki, Toshinori Hosokawa (Nihon Univ.)  VLD2008-60 DC2008-28 |
In recent year, transition fault testing and/or bridging fault testing for VLSIs are increasingly required in addition t... [more] | VLD2008-60 DC2008-28 pp.1-6 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2008-11-17 13:25 |
Fukuoka | Kitakyushu Science and Research Park | An Integer Programming Formulation for Generating High Quality Transition Tests Tsuyoshi Iwagaki, Mineo Kaneko (Japan Advanced Institute of Science and Technology) VLD2008-61 DC2008-29 |
[more] | VLD2008-61 DC2008-29 pp.7-12 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2008-11-17 13:50 |
Fukuoka | Kitakyushu Science and Research Park | A Capture-Safe Test Generation Scheme for At-speed Scan Testing Atsushi Takashima, Yuta Yamato, Hiroshi Furukawa, Kohei Miyase, Xiaoqing Wen, Seiji Kajihara (Kyusyu Institute of Technology) VLD2008-62 DC2008-30 |
Capture-safety, defined as the avoidance of any timing error due to unduly high switching activity in capture mode durin... [more] | VLD2008-62 DC2008-30 pp.13-18 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2008-11-17 14:15 |
Fukuoka | Kitakyushu Science and Research Park | Analysis of Open Fault using TEG Chip Toshiyuki Tsutsumi, Yasuyuki Kariya, Koji Yamazaki (Meiji Univ), Masaki Hashizume, Hiroyuki Yotsuyanagi (Tokushima Univ), Hiroshi Takahashi, Yoshinobu Higami, Yuzo Takamatsu (Ehime Univ) VLD2008-63 DC2008-31 |
The high integration of the semiconductor technology advances, and the fault detection and the failure diagnosis of LSI ... [more] | VLD2008-63 DC2008-31 pp.19-24 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2008-11-17 15:00 |
Fukuoka | Kitakyushu Science and Research Park | Area Efficient Multipliers Utilizing the Sum of Operands Hirotaka Kawashima, Naofumi Takagi (Nagoya Univ.) VLD2008-64 DC2008-32 |
A method to halve the number of partial product bits in multiplication is proposed. An integrated partial product (IPP) ... [more] | VLD2008-64 DC2008-32 pp.25-30 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2008-11-17 15:25 |
Fukuoka | Kitakyushu Science and Research Park | Hardware Algorithm for Division in GF(2^m) Based on the Extended Euclid's Algorithm Accelerated with Parallelization of Modular Reductions Katsuki Kobayashi, Naofumi Takagi (Nagoya Univ.) VLD2008-65 DC2008-33 |
We propose a fast hardware algorithm for division in GF(2^m). It is based on the extended Euclid's algorithm and requir... [more] | VLD2008-65 DC2008-33 pp.31-36 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2008-11-17 15:50 |
Fukuoka | Kitakyushu Science and Research Park | Multi-Rate Compatible High Throughput Irregular LDPC Decoder Based on High-Efficiency Column Operation Unit Akiyuki Nagashima, Yuta Imai, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.) VLD2008-66 DC2008-34 |
Low Density Parity Check (LDPC) code is expected to be an error correcting code for next generation networks since it sh... [more] | VLD2008-66 DC2008-34 pp.37-42 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2008-11-17 16:15 |
Fukuoka | Kitakyushu Science and Research Park | A Parallel Hardware Engine for Generating Deformed Maps Akira Arahata, Ryuta Nara, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.) VLD2008-67 DC2008-35 |
[more] | VLD2008-67 DC2008-35 pp.43-48 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2008-11-17 13:00 |
Fukuoka | Kitakyushu Science and Research Park | Scan-based Attack for an AES-LSI included with other IPs Ryuta Nara, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ) VLD2008-68 DC2008-36 |
The threat of side-channel attacks of cryptography LSIs is indicated. Recently, Scan-based attacks using the scan chain... [more] |
VLD2008-68 DC2008-36 pp.49-53 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2008-11-17 13:25 |
Fukuoka | Kitakyushu Science and Research Park | Dynamically Variable Secure Scan Architecture against Scan-based Side Channel Attack on Cryptography LSIs Hiroshi Atobe, Ryuta Nara, Youhua Shi, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.) VLD2008-69 DC2008-37 |
Scan test is a powerful and popular test technique because it can control and observe the internal states of the circuit... [more] | VLD2008-69 DC2008-37 pp.55-59 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2008-11-17 13:50 |
Fukuoka | Kitakyushu Science and Research Park | A Power Masking Method of AES Circuit By Using Cross Bar Switch To Switch S-Box Circuit. Nobuyuki Kawahata, Ryuta Nara, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ) VLD2008-70 DC2008-38 |
[more] | VLD2008-70 DC2008-38 pp.61-66 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2008-11-17 14:30 |
Fukuoka | Kitakyushu Science and Research Park | On Handling Cell Placement with Exclusive Adjacent Symmetry Constraints for Analog IC Layout Design Shimpei Asano, Kunihiro Fujiyoshi (Tokyo University of Agriculture and Technology) VLD2008-71 DC2008-39 |
(To be available after the conference date) [more] | VLD2008-71 DC2008-39 pp.67-72 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2008-11-17 14:55 |
Fukuoka | Kitakyushu Science and Research Park | CAFE router: A Fast Connectivity Aware Multi-net Routing Algorithm for Routing Grid with Obstacles Yukihide Kohira, Atsushi Takahashi (Tokyo Tech) VLD2008-72 DC2008-40 |
Due to the increase of operation frequency in recent LSI systems, signal propagation delays are required to achieve spec... [more] | VLD2008-72 DC2008-40 pp.73-78 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2008-11-17 15:40 |
Fukuoka | Kitakyushu Science and Research Park | Coarse-Grained Reconfigurable Architecture with Flexible Reliability Younghun Ko, Dawood Alnajjar, Yukio Mitsuyama, Masanori Hashimoto, Takao Onoye (Osaka Univ.) VLD2008-73 DC2008-41 |
Acceptable soft error rate on a VLSI chip varies depending on applications and operating environment so that recent VLSI... [more] | VLD2008-73 DC2008-41 pp.79-84 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2008-11-17 16:05 |
Fukuoka | Kitakyushu Science and Research Park | Insertion-Point Selection of Canary FF for Timing Error Prediction Yuji Kunitake (Kyushu Univ.), Toshinori Sato (Fukuoka Univ.), Seiichiro Yamaguchi, Hiroto Yasuura (Kyushu Univ.) |
The deep submicron semiconductor technologies increase parameter ariations. The increase in parameter variations require... [more] | VLD2008-74 DC2008-42 pp.85-89 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2008-11-17 16:30 |
Fukuoka | Kitakyushu Science and Research Park | Evaluating the reliability of Highly Reliable Cell Circuits Keiichi Hotta, Takashi Nakada, Masaki Nakanishi, Shigeru Yamashita, Yasuhiko Nakashima (Nara Institute of Science and Technology) VLD2008-75 DC2008-43 |
Recently, the shrinking process causes transistor variation and growth of error rate. Highly Reliable Cells (HRCs) have ... [more] | VLD2008-75 DC2008-43 pp.91-96 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2008-11-17 13:00 |
Fukuoka | Kitakyushu Science and Research Park | An emulation experiment of an inversion/non-inversion dynamic optical reconfiguration architecture Shinichi Kato, Minoru Watanabe (Shizuoka Univ.) RECONF2008-38 |
[more] | RECONF2008-38 pp.1-4 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2008-11-17 13:25 |
Fukuoka | Kitakyushu Science and Research Park | Assembly accuracy of a holographic memory in an optically reconfigurable gate array Hironobu Morita, Minoru Watanabe (Shizuoka Univ.) RECONF2008-39 |
[more] | RECONF2008-39 pp.5-8 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2008-11-17 13:50 |
Fukuoka | Kitakyushu Science and Research Park | Preliminary Evaluations of SMA: A Massive Array of Low-Power Reconfigurable Processors Hideharu Amano (Keio Univ.), Kyundong Kim (Tokyo Univ.), Hiroki Matsutani, Vasutan Tunbungheng, Yoshihiro Yasuda (Keio Univ.), Masaaki Kondo (The University of Electro-Communications), Hiroshi Nakamura (Tokyo Univ.), Kimiyoshi Usami (Shibaura Inst. of Tech.) RECONF2008-40 |
SMA (Silent Mega Array) is a highly energy efficient coarse-grained reconfigurable system. By mapping a data-flow grap... [more] |
RECONF2008-40 pp.9-14 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2008-11-17 14:15 |
Fukuoka | Kitakyushu Science and Research Park | A Method of Processing Data-Parallel Tasks on Multi-Context Reconfigurable Processor Koichi Araki, Yukinori Sato, Yasushi Inoguchi (Japan Advanced Institute of Science and Technology) RECONF2008-41 |
A Multi-context Reconfigurable Processor (MRP) can treat various tasks with hardware. However, in the case of treating a... [more] | RECONF2008-41 pp.15-20 |
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