Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-01 12:45 |
Nagasaki |
Nagasaki Kinro Fukushi Kaikan |
Scan Segmentation Approach to Magnify Detection Sensitivity for Tiny Hardware Trojan Fakir Sharif Hossain, Tomokazu Yoneda, Michiko Inoue (NAIST) VLD2015-38 DC2015-34 |
Outsourcing of IC fabrication components has initiated the potential threat of design tempering using hardware Trojans ... [more] |
VLD2015-38 DC2015-34 pp.1-6 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-01 13:10 |
Nagasaki |
Nagasaki Kinro Fukushi Kaikan |
Implementation of ECDSA Using Gate-level Pipelined Self-synchronous Circuit Masato Tamura, Makoto Ikeda (Univ. of Tokyo) VLD2015-39 DC2015-35 |
In this paper, we investigated the implementation method of elliptic curve digital signature algorithm using self-synchr... [more] |
VLD2015-39 DC2015-35 pp.7-12 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-01 12:45 |
Nagasaki |
Nagasaki Kinro Fukushi Kaikan |
Triple modular redundancy on a parallel-operation-oriented optically reconfigurable gate array Yoshizumi Ito, Minoru Watanabe (Shizuoka Univ.) RECONF2015-47 |
[more] |
RECONF2015-47 pp.1-4 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-01 13:10 |
Nagasaki |
Nagasaki Kinro Fukushi Kaikan |
Fault tolerance of an inversion configuration method on an optically configurable gate array Hiroki Shinba, Minoru Watanabe (Shizuoka Univ.) RECONF2015-48 |
[more] |
RECONF2015-48 pp.5-8 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-01 12:45 |
Nagasaki |
Nagasaki Kinro Fukushi Kaikan |
Performance Evaluations of Document-Oriented Databases using Remote GPU Cluster Shin Morishima, Hiroki Matsutani (Keio Univ.) CPSY2015-61 |
(To be available after the conference date) [more] |
CPSY2015-61 pp.1-6 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-01 13:10 |
Nagasaki |
Nagasaki Kinro Fukushi Kaikan |
A study of GPU acceleration of "source" part in Hall-thruster simulation Takaaki Miyajima, Shinatora Cho, Naoyuki Fujita (JAXA) CPSY2015-62 |
Electric propulsion is expected to drastically drive down the transportation cost in space. It can realize 10 times high... [more] |
CPSY2015-62 pp.7-12 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-01 13:50 |
Nagasaki |
Nagasaki Kinro Fukushi Kaikan |
[Invited Talk]
IC Chip Authentication and Guarantee
-- As Root Problems of Hardware Security -- Makoto Nagata (Kobe Univ.) CPM2015-126 ICD2015-51 |
[more] |
CPM2015-126 ICD2015-51 pp.1-6 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-01 14:40 |
Nagasaki |
Nagasaki Kinro Fukushi Kaikan |
[Invited Talk]
Video Coding Hardware Technologies for Distributing 4K/8K Ultra High Definition Images Takayuki Onishi, Hiroe Iwasaki, Atsushi Shimizu (NTT) CPM2015-127 ICD2015-52 |
[more] |
CPM2015-127 ICD2015-52 p.7 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-01 13:50 |
Nagasaki |
Nagasaki Kinro Fukushi Kaikan |
Partial Recofniguration for Accelerator-in-switch Hideharu Amano, Yuichi Sakurai, Chiharu Tsuruta (Keio Univ.) RECONF2015-49 |
[more] |
RECONF2015-49 pp.9-12 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-01 14:15 |
Nagasaki |
Nagasaki Kinro Fukushi Kaikan |
Dynamic Reconfigurable PLA on FPGA and DSL-based Design Methodology Takefumi Miyoshi (wasalabo/e-trees), Hiroki Nakahara (ehime university), Satoshi Funada (e-trees) RECONF2015-50 |
[more] |
RECONF2015-50 pp.13-18 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-01 15:05 |
Nagasaki |
Nagasaki Kinro Fukushi Kaikan |
Development and Evaluation of Simulator for Cellular Neural Network Tomoya Kameda (NAIST), Mutsumi Kimura (Ryukoku Univ.), Yasuhiko Nakashima (NAIST) CPSY2015-63 |
[more] |
CPSY2015-63 pp.13-17 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-01 13:50 |
Nagasaki |
Nagasaki Kinro Fukushi Kaikan |
Background Sequence Generation for Neighborhood Pattern Sensitive Fault Testing in Random Access Memories Shin'ya Ueoka, Tomokazu Yoneda, Yuta Yamato, Michiko Inoue (NAIST) VLD2015-40 DC2015-36 |
The Neighborhood Pattern Sensitive Fault (NPSF) is widely discussed fault model for memories, and it occurs when a memor... [more] |
VLD2015-40 DC2015-36 pp.19-24 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-01 14:15 |
Nagasaki |
Nagasaki Kinro Fukushi Kaikan |
A study on multiple path selection conditions in delay testing using design-for-testability circuit Mori Ryosuke, Yotsuyanagi Hiroyuki, Hashizume Masaki (Tokushima Univ.) VLD2015-41 DC2015-37 |
[more] |
VLD2015-41 DC2015-37 pp.25-30 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-01 14:40 |
Nagasaki |
Nagasaki Kinro Fukushi Kaikan |
On discrimination method of a resistive open using delay variation induced by signal transitions on adjacent lines Kotaro Ise, Hiroyuki Yotsuyanagi, Masaki Hashizume (Tokushima Univ.), Yoshinobu Higami, Hiroshi Takahashi (Ehime Univ.) VLD2015-42 DC2015-38 |
The effect of a resistive open results in small delay in an IC. It is difficult to test small delay since signal delay a... [more] |
VLD2015-42 DC2015-38 pp.31-36 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-01 15:05 |
Nagasaki |
Nagasaki Kinro Fukushi Kaikan |
Fast Monte Carlo based timing yield calculation Hiromitsu Awano, Takashi Sato (Kyoto Univ.) VLD2015-43 DC2015-39 |
[more] |
VLD2015-43 DC2015-39 pp.37-42 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-01 15:45 |
Nagasaki |
Nagasaki Kinro Fukushi Kaikan |
[Fellow Memorial Lecture]
Improving System Dependability by VLSI Test Technology Seiji Kajihara (KIT) VLD2015-44 CPM2015-128 ICD2015-53 CPSY2015-64 DC2015-40 RECONF2015-51 |
VLSI Test technology for detection of manufacturing faults has been developed to improve test quality that is the capabi... [more] |
VLD2015-44 CPM2015-128 ICD2015-53 CPSY2015-64 DC2015-40 RECONF2015-51 pp.43-44(VLD), pp.9-10(CPM), pp.9-10(ICD), pp.19-20(CPSY), pp.43-44(DC), pp.19-20(RECONF) |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-01 17:00 |
Nagasaki |
Nagasaki Kinro Fukushi Kaikan |
[Fellow Memorial Lecture]
Reconfigurable Chips, High-Level Synthesis, and EDA Business Kazutoshi Wakabayashi (NEC) |
[more] |
|
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-02 11:15 |
Nagasaki |
Nagasaki Kinro Fukushi Kaikan |
Improved Method of Simulated Annealing for Unreachable Solution Space Hiroyuki Nakano, Kunihiro Fujiyoshi (TUAT) VLD2015-45 DC2015-41 |
Simulated Annealing is a universal probabilistic metaheuristic for the general optimization problem of locating a good a... [more] |
VLD2015-45 DC2015-41 pp.45-50 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-02 11:40 |
Nagasaki |
Nagasaki Kinro Fukushi Kaikan |
On applications of Monte-Carlo tree search algorithm for CAD problems Yusuke Matsunaga (Kyushu Univ.) VLD2015-46 DC2015-42 |
[more] |
VLD2015-46 DC2015-42 pp.51-55 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-02 11:15 |
Nagasaki |
Nagasaki Kinro Fukushi Kaikan |
A Study of HW/SW Co-design Framework based on the Virtualization Technology Qian Zhao, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2015-52 |
One challenge for the heterogeneous computing with the FPGA is to bridge the development gap between SW and HW design. T... [more] |
RECONF2015-52 pp.21-26 |