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Technical Committee on VLSI Design Technologies (VLD)  (2019 - )

Chair: Nozomu Togawa (Waseda Univ.) Vice Chair: Daisuke Fukuda (Fujitsu Labs.)
Secretary: Yukihide Kohira (Univ. of Aizu), Yuichi Sakurai (Hitachi)
Assistant: Kazuki Ikeda (Hitachi)

[Go to Official VLD Homepage (Japanese)] 
 Schedule  (Sort by: Date Ascending)
 3件中 1~3件目  /   
Date Place Topics Joint Deadline Select Menu
Wed, Nov 13, 2019
- Fri, Nov 15
Ehime Prefecture Gender Equality Center Design Gaia 2019 -New Field of VLSI Design- VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]
[Wed, Sep 4]
  • Detailed Info.
       (Japanese)
  • Regist. Closed
  • Adv. Program
  • Registration Fee 
  • Wed, Jan 22, 2020
    - Fri, Jan 24
    Raiosha, Hiyoshi Campus, Keio University FPGA Applications, etc. IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] [Tue, Nov 12]
  • Detailed Info.
  • Regist. Closed
  • Adv. Program
  • Registration Fee 
  • Wed, Mar 4, 2020
    - Sat, Mar 7
    Okinawa Ken Seinen Kaikan Design Technology for System-on-Silicon, Hardware Security, etc. HWS, VLD [detail] [Fri, Jan 17]
  • Regist. Closed
  • Registration Fee 
  •  3件中 1~3件目  /   


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