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Technical Committee on Silicon Device and Materials (SDM)  (Searched in: 2014)

Search Results: Keywords 'from:2015-01-27 to:2015-01-27'

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Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Ascending)
 Results 1 - 12 of 12  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
SDM 2015-01-27
10:00
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Analytical formulation of interfacial SiO2scavenging in HfO2/SiO2/Si stacks
Xiuyan Li, Takeaki Yajima, Tomonori Nishimura, Kosuke Nagashio, Akira Toriumi (Univ. of Tokyo) SDM2014-135
 [more] SDM2014-135
pp.1-4
SDM 2015-01-27
10:25
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Dramatic Effects of Hydrogen-induced Out-diffusion of Oxygen from Ge Surface on Junction Leakage as well as Electron Mobility in n-channel Ge MOSFETs
ChoongHyun Lee, Tomonori Nishimura, Cimang Lu, Shoichi Kabuyanagi, Akira Toriumi (Univ. of Tokyo) SDM2014-136
 [more] SDM2014-136
pp.5-8
SDM 2015-01-27
10:50
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] High Ion/Ioff Ge-source Ultrathin Body Strained-SOI Tunnel FETs -- Impact of Channel Strain, MOS Interfaces and Back Gate on the Electrical Properties --
Minsoo Kim, Yuki K. Wakabayashi, Ryosho Nakane, Masafumi Yokoyama, Mitsuru Takenaka, Shinichi Takagi (The Univ. of Tokyo) SDM2014-137
High performance operation of Ge-source/strained-Si-channel hetero-junction tunnel FETs is demonstrated. It is found tha... [more] SDM2014-137
pp.9-12
SDM 2015-01-27
11:15
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] High-performance tri-gate poly-Ge Junction-less p- and n-MOSFETs Fabricated by Flash Lamp Annealing Process
Koji Usuda, Yoshiki Kamata, Yuuichi Kamimuta, Takahiro Mori, Masahiro Koike, Tsutomu Tezuka (AIST) SDM2014-138
Poly-crystalline Ge (poly-Ge) layer can be candidate for the channel of stacking 3D-CMOS from the viewpoint of low-therm... [more] SDM2014-138
pp.13-16
SDM 2015-01-27
11:40
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Coupled Monte Carlo Simulation of Transient Electron-Phonon Transport in Small FETs
Yoshinari Kamakura, Indra Nur Adisusilo, Kentaro Kukita, Go Wakimura (Osaka Univ.), Shunsuke Koba, Hideaki Tsuchiya (Kobe Univ.), Nobuya Mori (Osaka Univ.) SDM2014-139
 [more] SDM2014-139
pp.17-20
SDM 2015-01-27
14:00
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] High-precision Wafer-level Cu-Cu Bonding for 3DICs
Masashi Okada, Isao Sugaya, Hajime Mitsuishi, Hidehiro Maeda, Shigeto Izumi, Hosei Nakahira, Kazuya Okamoto (Nikon) SDM2014-140
 [more] SDM2014-140
pp.21-24
SDM 2015-01-27
14:25
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Three-Dimensional Integrated CMOS Image Sensors with Pixel-Parallel A/D Converters Fabricated by Direct Bonding of SOI Layers
Masahide Goto, Kei Hagiwara, Yoshinori Iguchi, Hiroshi Ohtake (NHK), Takuya Saraya, Masaharu Kobayashi, Eiji Higurashi, Hiroshi Toshiyoshi, Toshiro Hiramoto (The Univ. of Tokyo) SDM2014-141
We report the first demonstration of three-dimensional (3D) integrated CMOS image sensors with pixel-parallel A/D conver... [more] SDM2014-141
pp.25-28
SDM 2015-01-27
14:50
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Low power and high memory density STT-MRAM for embedded cache memory using advanced perpendicular MTJ integrations and asymmetric compensation techniques
Kazutaka Ikegami, Hiroki Noguchi, Chikayoshi Kamata, Minoru Amano, Keiko Abe, Keiichi Kushida, Takao Ochiai, Naoharu Shimomura, Shogo Itai, Daisuke Saida, Chika Tanaka, Atsushi Kawasumi, Hiroyuki Hara, Junichi Ito, Shinobu Fujita (Toshiba) SDM2014-142
Due to difficulty to increase clock frequency, recent processors increase cache memory to improve performance. However, ... [more] SDM2014-142
pp.29-32
SDM 2015-01-27
15:30
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Accurate Prediction of PBTI Lifetime in N-type Fin-Channel High-k Tunnel FETs
Wataru Mizubayashi, Takahiro Mori, Koichi Fukuda, Yongxun Liu, Takashi Matsukawa, Yuki Ishikawa, Kazuhiko Endo, Shinichi Ohuchi, Junichi Tsukada, Hiromi Yamauchi, Yukinori Morita, Shinji Migita, Hiroyuki Ota, Meishoku Masahara (AIST) SDM2014-143
The positive bias temperature instability (PBTI) characteristics for n-type fin-channel tunnel FETs (TFETs) with high-k ... [more] SDM2014-143
pp.33-36
SDM 2015-01-27
15:55
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] 16 nm FinFET High-k/Metal-gate 256-kbit 6T SRAM Macros with Wordline Overdriven Assist
Makoto Yabuuchi, Masao Morimoto, Yasumasa Tsukamoto, Shinji Tanaka, Koji Tanaka, Miki Tanaka, Koji Nii (Renesas) SDM2014-144
We demonstrate 16 nm FinFET High-k/Metal-gate SRAM macros with a wordline (WL) overdriven read/write-assist circuit. Tes... [more] SDM2014-144
pp.37-40
SDM 2015-01-27
16:20
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Scaling Breakthrough for Analog/Digital Circuits by Suppressing Variability and Low-Frequency Noise for FinFETs by Amorphous Metal Gate Technology
Takashi Matsukawa, Koichi Fukuda, Yongxun Liu, Junichi Tsukada, Hiromi Yamauchi, Yuki Ishikawa, Kazuhiko Endo, Shinichi O'uchi, Shinji Migita, Wataru Mizubayashi, Yukinori Morita, Hiroyuki Ota, Meishoku Masahara (AIST) SDM2014-145
 [more] SDM2014-145
pp.41-44
SDM 2015-01-27
16:45
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Experimental Realization of Complementary p- and n- Tunnel FinFETs with Subthreshold Slopes of Less than 60 mV/decade and Very Low (pA/um) Off-Current on a Si CMOS Platform
Yukinori Morita, Takahiro Mori, Koichi Fukuda, Wataru Mizubayashi, Shinji Migita, Takashi Matsukawa, Kazuhiko Endo, Shinichi O'uchi, Yongxun Liu, Meishoku Masahara, Hiroyuki Ota (AIST) SDM2014-146
Complementary (p- and n-type) tunnel FinFETs operating with subthreshold slopes (SSs) of less than 60 mV/decade and very... [more] SDM2014-146
pp.45-48
 Results 1 - 12 of 12  /   
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