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Technical Committee on Reconfigurable Systems (RECONF) (Searched in: 2009)
Search Results: Keywords 'from:2009-05-14 to:2009-05-14'
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| RECONF | 2009-05-14 13:00 |
Fukui | Performance Evaluation of Reconfigurable Processor Hy-DiSC based on MeP Hardware Extension Ken'ichi Umeda, Takuro Uchida, Kazuya Tanigawa, Tetsuo Hironaka (Hiroshima City Univ)  RECONF2009-1 |
We have developed the reconfigurable processor Hy-DiSC for stream processing. Hy-DiSC processor consists of MeP and DS-H... [more] | RECONF2009-1 pp.1-6 |
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| RECONF | 2009-05-14 13:30 |
Fukui | Real Chip Evaluation of Dynamically Reconfigurable Processor Array MuCCRA-3 Yoshihiro Yasuda, Yoshiki Saito, Toru Sano, Masaru Kato, Hideharu Amano (Keio Univ.) RECONF2009-2 |
Dynamically Reconfigurable Processor Array(DRPA) has been received an attention as a flexible and power efficient off-lo... [more] | RECONF2009-2 pp.7-12 |
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| RECONF | 2009-05-14 14:00 |
Fukui | Performance and Cost Evaluations of On-Chip Network Topologies in FPGAs Sen In, Hiroki Matsutani, Daihang Wang (Keio Univ), Michihiro Koibuchi (NII), Hideharu Amano (Keio Univ) RECONF2009-3 |
The on-chip interconnection network has been used to connect many modules in reconfigurable systems, such as FPGAs, Th... [more] |
RECONF2009-3 pp.13-18 |
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| RECONF | 2009-05-14 14:30 |
Fukui | A Power of FPGA Reduction Using FPGA Routing Structure Based on the Small-World Network Shoichi Nishida (Kumamoto Univ.), Yuzo Nishioka (Hitachi-Omron Terminal Solutions, Corp.), Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2009-4 |
The performance of field-programmable gate arrays(FPGA) has improved dramatically owing to new process technology. But, ... [more] | RECONF2009-4 pp.19-24 |
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| RECONF | 2009-05-14 15:10 |
Fukui | Proposal and Implementation of High Throughput Algorithm for Combination Generation Akira Tsuji, Norio Yamagaki, Satoshi Kamiya (NEC) RECONF2009-5 |
Combinatorial optimization problems are widely exist. Generally they are solved by approximate means like greedy method... [more] |
RECONF2009-5 pp.25-30 |
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| RECONF | 2009-05-14 15:40 |
Fukui | Accelerating HMMER search using FPGA Toyokazu Takagi, Tsutomu Maruyama (Univ. of Tsukuba) RECONF2009-6 |
This paper describes an implementation of HMMER with FPGA. HMMER is one of the most used software tools for sensitive pr... [more] | RECONF2009-6 pp.31-36 |
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| RECONF | 2009-05-14 16:10 |
Fukui | Performance evaluation of an auto-generation algorithm of hardware modules for an FPGA-based general-purpose biochemical simulator Tomonori Ooya, Hideki Yamada, Tomoya Ishimori, Yuichiro Shibata (Nagasaki Univ), Yasunori Osana (Seikei Univ), Masato Yoshimi (Doshisha Univ), Yuri Nishikawa, Hideharu Amano, Akira Funahashi, Noriko Hiroi (Keio Univ), Kiyoshi Oguri (Nagasaki Univ) RECONF2009-7 |
One of the obvious advantages of FPGA-based reconfigurable computing is customizability of a tradeoff point between perf... [more] | RECONF2009-7 pp.37-42 |
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| RECONF | 2009-05-14 17:00 |
Fukui | [Invited Talk]
Development of Interactive Supercomputing Environment Shin-ichiro Mori (Univ. of Fukui), Tomohiro Kuroda, Naoto Kume (Kyoto Univ.), Yoshihiro Kuroda (Osaka Univ.), Megumi Nakao, Hajime Shimada, Yasuhiko Nakashima (NAIST), Shinji Tomita (Kyoto Univ.) RECONF2009-8 |
Toward the Era of Interactive Supercomputing,, the authors have promoted the five years research project on the Real-Tim... [more] | RECONF2009-8 pp.43-48 |
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| RECONF | 2009-05-15 09:30 |
Fukui | Recovery and syncronization technique for TMR softcore processor Yoshihiro Ichinomiya, Shiro Tanoue, Toshio Yabuta, Motoki Amagasaki, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2009-9 |
This paper presents a technique for ensuring reliable softcore processor implemented on SRAM-based Field Programmable Ga... [more] | RECONF2009-9 pp.49-54 |
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| RECONF | 2009-05-15 10:00 |
Fukui | A low-power clustering tool using both routability and activity for FPGAs Junya Eto, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2009-10 |
Although FPGA(Field Programmable Gate Array) has high exibility, there is a problem that power consumption is larger tha... [more] | RECONF2009-10 pp.55-60 |
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| RECONF | 2009-05-15 10:30 |
Fukui | A Memory Access Optimization Method for Reconfigurable Systems Based on a Multithread Programming Model Keisuke Dohi, Sayaka Shida, Yuichiro Shibata, Tsuyoshi Hamada, Tomonari Masada, Kiyoshi Oguri (Nagasaki Univ.) RECONF2009-11 |
Reconfigurable systems are known to be able to achieve higher performance than traditional microprocessor architecture f... [more] | RECONF2009-11 pp.61-66 |
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| RECONF | 2009-05-15 11:00 |
Fukui | Development and Evaluation of Cryptographic Hardware Generated by Behavior-level Synthesis Yohei Hori, Mai Itoh (Chuo Univ.), Hideki Imai (Chuo Univ./AIST) RECONF2009-12 |
Cryptography is widely applied to various consumer electronics to protect digital contents, users' privacy, product co... [more] |
RECONF2009-12 pp.67-72 |
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| RECONF | 2009-05-15 12:40 |
Fukui | * Hiroyuki Kawai, Yoshiki Yamaguchi, Moritoshi Yasunaga (Tsukuba Univ.) RECONF2009-13 |
In this paper, we extend DDI (Direct Data Implementation), that is pattern data are directly transformed into logic circ... [more] | RECONF2009-13 pp.73-78 |
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| RECONF | 2009-05-15 13:10 |
Fukui | Real-time processing of local contrast enhancement on FPGA Kentaro Kokufuta, Tsutomu Maruyama (Univ. of Tsukuba) RECONF2009-14 |
Adaptive histogram equalization (AHE) is a method for the local contrast enhancement. AHE computes several histograms of... [more] | RECONF2009-14 pp.79-84 |
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| RECONF | 2009-05-15 13:40 |
Fukui | Performance comparison of GPU and FPGA in image processing Shuichi Asano, Tsutomu Maruyama (Univ. of Tsukuba) RECONF2009-15 |
Many applications in image processing have high inherent parallelism. FPGAs have shown very high performance in spite of... [more] | RECONF2009-15 pp.85-90 |
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| RECONF | 2009-05-15 14:20 |
Fukui | A comparative study of implementing N-body simulation on FPGAs, GPUs and general purpose processors Tsuyoshi Hamada (Nagasaki Univ), Khaled Benkrid (Univ. of Edinburgh), Kiego Nitadori (RIKEN), Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ) RECONF2009-16 |
[more] | RECONF2009-16 pp.91-96 |
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| RECONF | 2009-05-15 14:50 |
Fukui | Modularizing Flux Limiter Functions in UPACS for CFD Accelerator FLOPS-2D Kenta Inakagata, Hirokazu Morishita (Keio Univ.), Yasunori Osana (Seikei Univ.), Naoyuki Fujita (JAXA), Hideharu Amano (Keio Univ.) RECONF2009-17 |
Computational Fluid Dynamics(CFD) is taken notice as a design tool for aircraft components. CFD often lacks versatility ... [more] | RECONF2009-17 pp.97-102 |
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| RECONF | 2009-05-15 15:20 |
Fukui | Acceleration of UPACS subroutines with FPGAs Takaaki Yokoyama, Hirokazu Morishita (Keio Univ.), Yasunori Osana (Seikei Univ.), Naoyuki Fujita (JAXA), Hideharu Amano (Keio Univ.) RECONF2009-18 |
A cost effective reconfigurable processing engine using multiple FPGAs for accelerating UPACS, a CFD package produced by... [more] | RECONF2009-18 pp.103-108 |
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