Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
ICD, ITE-CE |
2006-01-26 10:00 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
High-Voltage Torelant Opamp Design Targeting for Future Scaled Transistors Koichi Ishida, Atit Tamtrakarn (Univ. of Tokyo), Hiroki Ishikuro (Toshiba Corp.), Takayasu Sakurai (Univ. of Tokyo) |
An outside-rail output opamp targeting for future scaled MOSFETs is designed and the 3-V-output operation is successfull... [more] |
ICD2005-205 pp.1-6 |
ICD, ITE-CE |
2006-01-26 10:30 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Phase Change RAM Operated with 1.5-V CMOS as Low Cost Embedded Memory Satoru Hanzawa, Kenichi Osada, Takayuki Kawahara, Riichiro Takemura (Hitachi CRL), Naoki Kitai (Hitachi ULSI), Norikatsu Takaura, Nozomu Matsuzaki, Kenzo Kurotsuchi (Hitachi CRL), Hiroshi Moriya (Hitachi MERL), Masahiro Moniwa (Renesas) |
This paper describes a phase change (PC) RAM operated at the lowest possible voltage, 1.5 V, with a CMOS memory array, u... [more] |
ICD2005-206 pp.7-12 |
ICD, ITE-CE |
2006-01-26 11:15 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
VDD-Hopping Accelerator for On-Chip Power Supplies Achieving Nano-Second Order Transient Time Kohei Onizuka, Takayasu Sakurai (Tokyo Univ.) |
A VDD-hopping accelerator for on-chip power supply circuits is proposed and the effectiveness of the accelerator circuit... [more] |
ICD2005-207 pp.13-17 |
ICD, ITE-CE |
2006-01-26 11:45 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Low Leakage-power FPGA Design using Zigzag Power-gating, Dual-VTH/VDD and Micro-VDD-hopping Canh Q. Tran (Tokyo University), Hiroshi Kawaguchi (Kobe University), Takayasu Sakurai (Tokyo University) |
[more] |
ICD2005-208 pp.19-24 |
ICD, ITE-CE |
2006-01-26 13:15 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Talk]
Overview of Cell Broadband Engine Processor
-- The Background of the Design and Examples of its Application -- Hiroo Hayashi (Toshiba Corp.) |
Cell Broadband Engine is a next generation microprocessor targeting from digital home entertainment to distributed compu... [more] |
ICD2005-209 pp.25-30 |
ICD, ITE-CE |
2006-01-26 14:15 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
A Design of Rough Set Processor for Data Mining Mitsuhiro Matsumoto, Masao Ohkura, Akihiko Tsukahara, Akinori Kanasugi (Tokyo Denki Univ.) |
[more] |
ICD2005-210 pp.31-36 |
ICD, ITE-CE |
2006-01-26 15:00 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Architecture of Multi-Context FPGA Using a Hybrid Multiple-Valued/Binary Context Swtching Signal Yoshihiro Nakatani, Masanori Hariyama, Michitaka Kameyama (Tohoku Univ.) |
[more] |
ICD2005-211 pp.37-42 |
ICD, ITE-CE |
2006-01-26 15:30 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Stereo Vision Processor Based on Window-Parallel-and-Pixel-Parallel Architecture Naoto Yokoyama, Masanori Hariyama (Tohoku Univ.), Yasuhiro Kobayashi (Oyama College), Michitaka Kameyama (Tohoku Univ.) |
[more] |
ICD2005-212 pp.43-46 |
ICD, ITE-CE |
2006-01-26 16:10 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Footless Dual-Rail Domino Circuit with Self-Timed Preharge Scheme in SOI Technology KinHooi Dia, Ruotong Zheng, Makoto Ikeda, Kunihiro Asada (Univ. of Tokyo) |
This paper presents a new footless dual-rail domino circuit that efficiently combines a footless dynamic circuit techniq... [more] |
ICD2005-213 pp.47-51 |
ICD, ITE-CE |
2006-01-26 16:40 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Measurements of Digital Signal Delay Variation Due to Dynamic Power Supply Noise Mitsuya Fukazawa, Makoto Nagata (Kobe Univ.) |
[more] |
ICD2005-214 pp.53-57 |
ICD, ITE-CE |
2006-01-27 10:00 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Information-Accessing Furniture to Make Our Everyday Lives More Confortable Hiroko Sukeda, Youichi Horry, Yukinobu Maruyama, Takeshi Hoshino (Hitachi) |
A concept for information equipment called information-accessing furniture is presented. We developed a module to be ass... [more] |
ICD2005-215 pp.1-6 |
ICD, ITE-CE |
2006-01-27 10:30 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Two TV Interfaces for Accessing Contents at Ease in an “Always-Recording” Multi-Channel Situation Jun-ichiro Watanabe, Yujin Tsukada, Takaaki Ishii, Sergio Paolantonio (Hitachi, Ltd.) |
We propose two TV interfaces for accessing a rich variety of contents stored in large-capacity HDD at ease. The first on... [more] |
ICD2005-216 pp.7-12 |
ICD, ITE-CE |
2006-01-27 11:15 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Wide Band 3D Y/C Separation Circuit for PAL System with Reduced Memory Size Toshihiro Gai, Masaki Yamakawa (Mitsubishi Electric), Sohichiroh Higashi (Mitsubishi Electric Micro-computer Application Software), Tsuyoshi Inoue (Renesas Technology) |
This paper reports how a 3D Y/C separation circuit of PAL system with a 27 MHz-fixed clock has been achieved using a sma... [more] |
ICD2005-217 pp.13-15 |
ICD, ITE-CE |
2006-01-27 11:45 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
261MHz Parallel Tree Architecture for Full Search Variable Block Size Motion Estimation in H.264/AVC Zhenyu Liu (FAIS), Yang Song, Takeshi Ikenaga, Satoshi Goto (Waseda Univ.) |
A parallel tree architecture for full search variable block size motion estimation (VBSME) with integer pixel accuracy i... [more] |
ICD2005-218 pp.17-22 |
ICD, ITE-CE |
2006-01-27 13:15 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Special Invited Talk]
Parallel Processing Using Multicore Processors for Embedded Systems Junji Sakai (NEC) |
[more] |
ICD2005-219 pp.23-28 |
ICD, ITE-CE |
2006-01-27 14:15 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
High-Throughput LDPC Decoder Based on Memory-Reduction Method Tatsuyuki Ishikawa, Kazunori Shimizu, Takeshi Ikenaga, Satoshi Goto (Waseda Univ.) |
In this paper, we propose a high-throughput partially-parallel LDPC decoder for long code-length.
The decoder achieves... [more] |
ICD2005-220 pp.29-34 |
ICD, ITE-CE |
2006-01-27 15:00 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
A new video indexing technique based on perceptual clustering using extraction of ROI Masaki Yamauchi, Masayuki Kimura, Jun Omiya, Junji Nishikawa, Ichiro Okabayashi (Matsushita Elec.) |
In this paper, we propose a new automatic chapter generating technique for Digital Video Recorder based on a perceptual ... [more] |
ICD2005-222 pp.41-46 |
ICD, ITE-CE |
2006-01-27 15:30 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
A Method of Extracting Region of Interect Based on Attractiveness Masayuki Kimura, Masaki Yamauchi, Ichiro Okabayashi (Matsushita Elec.) |
[more] |
ICD2005-221 pp.35-39 |
ICD, ITE-CE |
2006-01-27 16:10 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
A Wireless LAN Baseband LSI for High-Definition A/V Content Transmission Masahiro Sekiya, Hideaki Nakakita, Noriyasu Kato, Takashi Wakutsu, Yukimasa Miyamoto, Akira Yamaga, , , , , , , , , (TOSHIBA Corp.) |
We have developed the IEEE 802.11a wireless LAN (WLAN) baseband LSI capable of transmitting High-Definition (HD) content... [more] |
ICD2005-223 pp.47-52 |
ICD, ITE-CE |
2006-01-27 16:40 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
A Newly Developed Single-chip LSI for HD DVD/DVD/CD Naofumi Ikuta, Shogo Suzuki, Takanori Kishida, Toshitaka Kuma, Miyuki Okamoto, Seiya Ota, Masato Fuma, Satoshi Noro (SANYO Electric Co. Ltd.) |
The demand for high-capacity media which can record high-definition movies for an extended time is increasing. HD DVD ha... [more] |
ICD2005-224 pp.53-58 |