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Technical Committee on Integrated Circuits and Devices (ICD) (Searched in: 2014)
Search Results: Keywords 'from:2014-04-17 to:2014-04-17'
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| ICD | 2014-04-17 09:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Tutorial Lecture]
Hybrid Storage of High-Speed Non-volatile RAM and Flash Memories Ken Takeuchi (Chuo Univ.)  ICD2014-1 |
[more] | ICD2014-1 p.1 |
| ICD | 2014-04-17 10:20 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
66.3KIOPS-Random-Read 690MB/s-Sequential-Read Universal Flash Storage Device Controller with Unified Memory Extension Kenichiro Yoshii, Konosuke Watanabe, Nobuhiro Kondo, Kenichi Maeda, Toshio Fujisawa, Junji Wadatsumi, Daisuke Miyashita, Shouhei Kousai, Yasuo Unekawa, Shinsuke Fujii, Takuma Aoyama, Takayuki Tamura, Atsushi Kunimatsu, Yukihito Oowaki (Toshiba) ICD2014-2 |
The world’s first embedded NAND storage device controller with Unified Memory (UM) has been demonstrated. UM achieves 2 ... [more] | ICD2014-2 pp.3-8 |
| ICD | 2014-04-17 11:20 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Requirements for Performance of Non-Volatile Memories in 3D TSV-Integrated Hybrid ReRAM/MLC NAND Solid-State Drive Kousuke Miyaji (Chuo Univ.), Hiroki Fujii (Univ. of Tokyo), Koh Johguchi (Chuo Univ.), Kazuhide Higuchi, Chao Sun (Univ. of Tokyo), Ken Takeuchi (Chuo Univ.) ICD2014-3 |
[more] | ICD2014-3 pp.9-14 |
| ICD | 2014-04-17 11:45 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Lecture]
Hybrid Storage of ReRAM/TLC NAND Flash with RAID-5/6 for Cloud Data Centers Hiroki Yamazawa, Tsukasa Tokutomi (Chuo Univ.), Shuhei Tanakamaru, Sheyang Ning (Chuo Univ./Univ. of Tokyo), Ken Takeuchi (Chuo Univ.) ICD2014-4 |
A hybrid storage architecture of ReRAM and TLC (3bit/cell) NAND Flash with RAID-5/6 is developed to meet cloud data-cent... [more] | ICD2014-4 pp.15-20 |
| ICD | 2014-04-17 12:10 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Design of Exchangeable MLC/TLC Hybrid Storage Array for Big Data Shogo Hachiya, Koh Johguchi (Chuo Univ.), Kousuke Miyaji (Shinshu Univ.), Ken Takeuchi (Chuo Univ.) ICD2014-5 |
A TLC-NAND flash provides a low cost and high capacity memory solution. However the reliability and access latency of TL... [more] | ICD2014-5 pp.21-26 |
| ICD | 2014-04-17 12:35 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Co-design of Application Software and NAND Flash Memory in Solid-State Drive for Database Storage System Kousuke Miyaji (Chuo Univ.), Chao Sun (Univ. of Tokyo), Ayumi Soga, Ken Takeuchi (Chuo Univ.) ICD2014-6 |
[more] | ICD2014-6 pp.27-32 |
| ICD | 2014-04-17 14:00 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Tutorial Lecture]
Prospects of High-speed, Low-power Nonvolatile Memory STT-MRAM Shinobu Fujita (Toshiba RDC) |
[more] | |
| ICD | 2014-04-17 14:50 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Lecture]
A 1Mb STT-MRAM for Nonvolatile Embedded Memories performing 1.5ns/2.1ns Random Read/Write Cycle Time
-- Background Write (BGW) Scheme applied to a 6T2MTJ Memory Cell -- Takashi Ohsawa, Hiroki Koike (Tohoku Univ.), Sadahiko Miura (NEC), Keizo Kinoshita (Tohoku Univ.), Hiroaki Honjo (NEC), Shoji Ikeda, Takahiro Hanyu, Hideo Ohno, Tetsuo Endoh (Tohoku Univ.) ICD2014-7 |
[more] | ICD2014-7 pp.33-38 |
| ICD | 2014-04-17 15:15 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Lecture]
Fabrication of a 99%-Energy-Less Nonvolatile Multi-Functional CAM Chip Using Hierarchical Power Gating for a Massively-Parallel Full-Text-Search Engine Shoun Matsunaga (Tohoku Univ.), Noboru Sakimura, Ryusuke Nebashi, Tadahiko Sugibayashi (NEC), Masanori Natsui, Akira Mochizuki, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu (Tohoku Univ.) ICD2014-8 |
We demonstrate a 1-Mb nonvolatile TCAM-based search engine using 90-nm CMOS and perpendicular MTJ technologies for an ul... [more] | ICD2014-8 pp.39-44 |
| ICD | 2014-04-17 15:50 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Panel Discussion]
Perspective of emerging memories in systems and systems on emerging memories Toru Miwa (SanDisk), Koji Nii (Renesas), Shinobu Fujita (Toshiba), Hiroki Koike (Tohoku Univ.), Ken Takeuchi (Chuo Univ.) ICD2014-9 |
(To be available after the conference date) [more] | ICD2014-9 p.45 |
| ICD | 2014-04-18 09:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | A 0.38-V Operating STT-MRAM with Process Variation Tolerant Sense Amplifier Yohei Umeki, Koji Yanagida, Shusuke Yoshimoto, Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi (Kobe Univ.), Koji Tsunoda, Toshihiro Sugii (LEAP) ICD2014-10 |
This paper exhibits a 65-nm 8-Mb spin transfer torque magnetoresistance random access memory (STT-MRAM) operating at a s... [more] | ICD2014-10 pp.47-51 |
| ICD | 2014-04-18 09:55 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Lecture]
Ultralow-Voltage Operation of Silicon-on-Thin-BOX (SOTB) 2Mbit SRAM Down to 0.37 V Utilizing Adaptive Back Bias Yoshiki Yamamoto, Hideki Makiyama, Tomohiro Yamashita, Hidekazu Oda, Shiro Kamohara, Nobuyuki Sugii, Yasuo Yamaguchi (LEAP), Tomoko Mizutani, Toshiro Hiramoto (UTokyo) ICD2014-11 |
We demonstrated record 0.37V minimum operation voltage (VMIN) of 2Mb Silicon-on-Thin-Buried-oxide (SOTB) 6T-SRAM. Thanks... [more] | ICD2014-11 pp.53-57 |
| ICD | 2014-04-18 10:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
A 7ns-Access-Time 25μW/MHz 128kb SRAM for Low-Power Fast Wake-Up MCU in 65nm CMOS with 27fA/b Retention Current Toshikazu Fukuda, Koji Kohara, Toshiaki Dozaka, Yasuhisa Takeyama, Tsuyoshi Midorikawa (Toshiba), Kenji Hashimoto, Ichiro Wakiyama (TOSMEC), Shinji Miyano, Takehiko Hojo (Toshiba) ICD2014-12 |
Low leakage 128kb SRAM with 65 nm technology that consumes only 3.5nA (27fA/b) in the retention mode is fabricated. Oper... [more] | ICD2014-12 pp.59-64 |
| ICD | 2014-04-18 11:20 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Lecture]
A 27% Active and 85% Standby Power Reduction in Dual-Power-Supply SRAM Using BL Power Calculator and Digitally Controllable Retention Circuit Keiichi Kushida, Fumihiko Tachibana, Osamu Hirabayashi, Yasuhisa Takeyama, Atsushi Kawasumi, Azuma Suzuki, Yusuke Niki, Miyako Shizuno, Sinichi Sasaki, Tomoaki Yabe, Yasuo Unekawa (Toshiba) ICD2014-13 |
This paper presents a dual-power-supply SRAM that reduces active and stand-by power from room temperature (RT) to high t... [more] | ICD2014-13 pp.65-70 |
| ICD | 2014-04-18 13:00 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
A 28nm 400MHz 4-Parallel 1.6Gsearch/s 80Mb Ternary CAM Koji Nii, Teruhiko Amano, Naoya Watanabe (Renesas Electronics), Minoru Yamawaki, Kenji Yoshinaga, Mihoko Wada (Renesas System Desgin), Isamu Hayashi (Renesas Electronics) ICD2014-14 |
[more] | ICD2014-14 pp.71-76 |
| ICD | 2014-04-18 13:50 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
Multigate FinFET Device and Circuit Technology for 10nm and Beyond Meishoku Masahara, Kazuhiko Endo, Shin-ichi Ouchi, Takashi Matsukawa, Yongxun Liu, Shinji Migita, Wataru Mizubayashi, Yukinori Morita, Hiroyuki Ota (AIST) ICD2014-15 |
One of the biggest challenges for the VLSI circuits with 20-nm-technology nodes and beyond is to overcome the issue of a... [more] | ICD2014-15 pp.77-82 |
| ICD | 2014-04-18 14:50 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Lecture]
Memory-Paper Trend in ISSCC
-- Analysis of past 10 years and future forecast -- Atsushi Kawasumi (Toshiba) ICD2014-16 |
A trend analysis and the future forecast on ISSCC memory paper referring “Call for paper” and the statistics of the acce... [more] | ICD2014-16 pp.83-84 |
| ICD | 2014-04-18 15:15 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Lecture]
A power-gated MPU with 3-microsecond entry/exit delay using MTJ-based nonvolatile flip-flop Hiroki Koike (Tohoku Univ.), Noboru Sakimura, Ryusuke Nebashi, Yukihide Tsuji, Ayuka Morioka, Sadahiko Miura, Hiroaki Honjo, Tadahiko Sugibayashi (NEC), Takashi Ohsawa, Shoji Ikeda, Takahiro Hanyu, Hideo Ohno, Tetsuo Endoh (Tohoku Univ.) ICD2014-17 |
We propose a novel power-gated microprocessor unit (MPU) using a nonvolatile flip-flop (NV-F/F) with magnetic tunnel jun... [more] | ICD2014-17 pp.85-90 |
| ICD | 2014-04-18 15:40 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | DataBase processor (DBP) which can search data ultra-high-speed
-- The Computing by Memory provides big innovation for information processing -- Katsumi Inoue (AOT), Cong-Kha Pham (UEC) ICD2014-18 |
Abstract The Processing burden of information search such as verification and recognition for conventional processor CPU... [more] | ICD2014-18 pp.91-96 |
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