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Technical Committee on Dependable Computing (DC)  (Searched in: 2021)

Search Results: Keywords 'from:2022-03-01 to:2022-03-01'
[Go to Official DC Homepage (Japanese)] 
Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Ascending)
 Results 1 - 14 of 14  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
DC 2022-03-01
09:30		 Tokyo Kikai-Shinko-Kaikan Bldg.
(Primary: On-site, Secondary: Online)		 Design of Successive Approximation ADC using Standard Cell Design Flow
Hiroshi Hirano, Satoshi Komatsu (Tokyo Denki Univ.) DC2021-64		 The spread of smartphones and IoT devices has led to a rapid increase in demand for semiconductors. In particular, ADCs... [more] DC2021-64
pp.1-6
DC 2022-03-01
09:55		 Tokyo Kikai-Shinko-Kaikan Bldg.
(Primary: On-site, Secondary: Online)		 Multi-process Automatic Generation System for ADC Using Standard cell
Takumi Fukushima, Satoshi Komatsu (Tokyo Denki Univ.) DC2021-65		 The demand for ADCs is increasing because of being used for a variety of semiconductors products.
Normally, ADCs is des... [more]		 DC2021-65
pp.7-12
DC 2022-03-01
10:20		 Tokyo Kikai-Shinko-Kaikan Bldg.
(Primary: On-site, Secondary: Online)		 DC2021-66 (To be available after the conference date) [more] DC2021-66
pp.13-17
DC 2022-03-01
10:55		 Tokyo Kikai-Shinko-Kaikan Bldg.
(Primary: On-site, Secondary: Online)		 On Correction for Temperature and Voltage Effects in On-Chip Delay Measurement
Takaaki Kato (KIT), Yousuke Miyake (PRIVATECH), Seiji Kajihara (KIT) DC2021-67		 It is effective for aging of a logic circuit to measure a circuit delay periodically in field. In order to compare the d... [more] DC2021-67
pp.18-23
DC 2022-03-01
11:20		 Tokyo Kikai-Shinko-Kaikan Bldg.
(Primary: On-site, Secondary: Online)		 Applicability Evaluation of the Delay Testable Circuit to PUF
Eisuke Ohama, Haruka Chino, Hiroyuki Yotuyanagi, Masaki Hashizume (Tokushima Univ.) DC2021-68		  [more] DC2021-68
pp.24-29
DC 2022-03-01
12:55		 Tokyo Kikai-Shinko-Kaikan Bldg.
(Primary: On-site, Secondary: Online)		 A TMR-Based Approximate Corrector for Fail-Operational Systems
Mitsuyoshi Ashida, Tomoo Inoue, Hideyuki Ichihara (City Univ) DC2021-70		  [more] DC2021-70
pp.33-38
DC 2022-03-01
13:20		 Tokyo Kikai-Shinko-Kaikan Bldg.
(Primary: On-site, Secondary: Online)		 Delay Fault Test Pattern Generation of Fault Tolerant Design Using Approximate Computing
Koji Makino, Hiroyuki Yotsuyanagi, Masaki Hashizume (Tokushima Univ.) DC2021-71		  [more] DC2021-71
pp.39-44
DC 2022-03-01
13:45		 Tokyo Kikai-Shinko-Kaikan Bldg.
(Primary: On-site, Secondary: Online)		 A Logic Locking Method based on SFLL-hd at Register Transfer Level
Yohei Noguchi, Masayoshi Yoshimura (Kyoto Sangyo Univ.), Atsuya Tsujikawa, Toshinori Hosokawa (Nihon Univ.) DC2021-72		 In recent years, with the increase of VLSI integration, LSI design companies utilize circuit design information, called ... [more] DC2021-72
pp.45-50
DC 2022-03-01
14:20		 Tokyo Kikai-Shinko-Kaikan Bldg.
(Primary: On-site, Secondary: Online)		 Evaluation of Efficiency for a Method to Locate High Power Consumption with Switching Provability
Ryu Hoshino, Taiki Utsunomiya, Kohei Miyase, Xiaoqing Wen, Seiji Kajihara (Kyutech) DC2021-73		 In recent years, as the high speed and miniaturization of LSIs have improved, it has become more difficult to test LSIs．... [more] DC2021-73
pp.51-56
DC 2022-03-01
14:45		 Tokyo Kikai-Shinko-Kaikan Bldg.
(Primary: On-site, Secondary: Online)		 SAT-based LFSR Seed Generation for Delay Fault BIST
Kotaro Iwamoto, Satoshi Ohtake (Oita Univ.) DC2021-74		 So far, a one-pass LFSR seed generation method for delay fault BIST has been proposed. The method directly generates see... [more] DC2021-74
pp.57-62
DC 2022-03-01
15:10		 Tokyo Kikai-Shinko-Kaikan Bldg.
(Primary: On-site, Secondary: Online)		 State assignment method to improve transition fault coverage for controllers including invalid states
Kyohei Iizuka, Toshinori Hosokawa, Hiroshi Yamazaki (Nihon Univ), Masayoshi Yoshimura (Kyoto Sangyo Univ) DC2021-75		  [more] DC2021-75
pp.63-68
DC 2022-03-01
15:45		 Tokyo Kikai-Shinko-Kaikan Bldg.
(Primary: On-site, Secondary: Online)		 Evaluation of Don't Care Filling Method of Control Signals to Enhance Fault Diagnosability for Logic and Timing Fault
Kohei Tsuchibuchi, Xu Haofeng, Yuya Chida, Toshinori Hosokawa (Nihon Univ), Koji Yamazaki (Meiji Univ) DC2021-76		  [more] DC2021-76
pp.69-74
DC 2022-03-01
16:10		 Tokyo Kikai-Shinko-Kaikan Bldg.
(Primary: On-site, Secondary: Online)		 An Estimation Method of Defect Types for Multi-cycle Capture Testing Using Artificial Neural Networks and Fault Detection Information
Natsuki Ota, Toshinori Hosokawa (Nihon Univ.), Koji Yamazaki (Meiji Univ.), Masayuki Arai, Yukari Yamauchi (Nihon Univ.) DC2021-77		  [more] DC2021-77
pp.75-80
DC 2022-03-01
16:35		 Tokyo Kikai-Shinko-Kaikan Bldg.
(Primary: On-site, Secondary: Online)		 DC2021-78  [more] DC2021-78
pp.81-86
 Results 1 - 14 of 14  /   
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