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Technical Committee on Dependable Computing (DC) (Searched in: 2013)
Search Results: Keywords 'from:2013-04-26 to:2013-04-26'
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| DC, CPSY | 2013-04-26 13:00 |
Tokyo | An Approach to Highly Reliable Scheme for a Digital Power Control Kenta Imai, Aromhack Saysanasongkham, Masayuki Arai, Satoshi Fukumoto, Keiji Wada (Tokyo Metropolitan Univ.)  CPSY2013-1 DC2013-1 |
Recently, a microcomputer and a FPGA are apt to be used for control of the power conversion circuits because of easily c... [more] | CPSY2013-1 DC2013-1 pp.1-6 |
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| DC, CPSY | 2013-04-26 13:25 |
Tokyo | Stateful NMR based RAID1 Minoru Uehara (Toyo Univ.) CPSY2013-2 DC2013-2 |
Recently, the demand of low cost large scale storages increases. We developed VLSD (Virtual Large Scale Disks) toolkit f... [more] | CPSY2013-2 DC2013-2 pp.7-12 |
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| DC, CPSY | 2013-04-26 13:50 |
Tokyo | Construction of Real-time Video Stabilizing System on an FPGA Hiroshi Maruyama, Toru Yabuki, Yoshiki Yamaguchi, Yuetsu Kodama (Univ. of Tsukuba) CPSY2013-3 DC2013-3 |
This paper proposes the hardware system that stabilizes the video image in real-time processing for compact embedded dev... [more] | CPSY2013-3 DC2013-3 pp.13-18 |
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| DC, CPSY | 2013-04-26 14:15 |
Tokyo | Proposal of Source-code Generator named Simple Logic Compiler for Low Power Accelerator CMA Nobuaki Ozaki, Hideharu Amano (Keio Univ.) CPSY2013-4 DC2013-4 |
We propose Simple Logic Compiler for Low power accelerator named CMA. Simple Logic Compiler receives simple script writt... [more] | CPSY2013-4 DC2013-4 pp.19-24 |
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| DC, CPSY | 2013-04-26 14:50 |
Tokyo | [Invited Talk]
Practical Case Study of Smart Grid and Smart Community Hiroaki Nishi (Keio Univ.) CPSY2013-5 DC2013-5 |
(To be available after the conference date) [more] | CPSY2013-5 DC2013-5 pp.25-29 |
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| DC, CPSY | 2013-04-26 15:50 |
Tokyo | Aumenting a Test Suite for Parameter Value Weighting Satoshi Fujimoto, Hideharu Kojima, Tatsuhiro Tsuchiya (Osaka Univ.) CPSY2013-6 DC2013-6 |
In this paper, we propose a weighting method for pair-wise testing. Pair-wise testing is a software testing strategy t... [more] |
CPSY2013-6 DC2013-6 pp.31-36 |
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| DC, CPSY | 2013-04-26 16:15 |
Tokyo | A study for implementing a 3D fluid simulation on an FPGA Kenta Fujinami, Akira Sugiura, Yoshiki Yamaguchi, Yuetsu Kodama (Univ. of Tsukuba) CPSY2013-7 DC2013-7 |
The fluid computation is widely used in sciences and engineering. In general, these computations require the huge simula... [more] | CPSY2013-7 DC2013-7 pp.37-42 |
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| DC, CPSY | 2013-04-26 16:40 |
Tokyo | On-Chip Delay Measurement Using Adjacent Test Architecture Kentaroh Katoh (TNCT) CPSY2013-8 DC2013-8 |
This paper proposes an on-chip delay measurement using adjacent test architecture with TDC (Time to Digital Converter). ... [more] | CPSY2013-8 DC2013-8 pp.43-48 |
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| DC, CPSY | 2013-04-26 17:05 |
Tokyo | A low latency topology for NoC using multiple host links Ryuta Kawano (Keio Univ.), Ikki Fujiwara (NII), Hiroki Matsutani, Hideharu Amano (Keio Univ.), Michihiro Koibuchi (NII) CPSY2013-9 DC2013-9 |
In recent many-core architectures, the number of cores has been steadily increasing. Therefore, network latency between ... [more] | CPSY2013-9 DC2013-9 pp.49-54 |
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