Fri, Sep 18 AM
Chair: Hideharu Amano (Keio Univ.)
09:00 - 10:15 |
| (1) |
09:00-09:25 |
A Design of Basic Functions and Forced Play of TRAX Game for FPGA with High-Level Synthesis Tool |
Tomonori Izumi, Masashi Ono, Yuuya Hiroe, Lin Meng (Ritsumeikan Univ.) |
| (2) |
09:25-09:50 |
Trax solver based on machine-learned evaluation function |
Takuya Nakamichi, Yusuke Sonoda, Takayuki Matsuzaki, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) |
| (3) |
09:50-10:15 |
Comparison of machine learning classifiers for HOG-based human detection on an FPGA |
Masahito Oishi, Yoshiki Hayashida, Ryo Fujita, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) |
Fri, Sep 18 AM
Chair: Minoru Watanabe (Shizuoka Univ.)
10:30 - 11:20 |
| (4) |
10:30-11:20 |
[Invited Talk]
Game Tree Search Techniques and its Application to Computer Shogi |
Shogo Takeuchi (Hokkaido Univ.) |
Fri, Sep 18 PM
Chair: Yutaka Yamada (Toshiba)
13:00 - 14:15 |
| (5) |
13:00-13:25 |
A High-level Hardware Design Environment in Python |
Shinya Takamaeda (NAIST) |
| (6) |
13:25-13:50 |
Design of Hardware Description Language FSL Based on Object-Oriented/Functional Programming Languages |
Nobuya Watanabe, Akira Nagoya (Okayama Univ.) |
| (7) |
13:50-14:15 |
Empirical evaluation of an arithmetic design approach with diversity and redundancy for FPGAs |
Yudai Shirakura, Kenichi Morimoto (Nagasaki Univ.), Masanori Nobe (MHPS), Masaharu Tanaka (MHI), Yuichiro Shibata, Hidenori Maruta, Fujio Kurokawa (Nagasaki Univ.) |
Fri, Sep 18 PM
Chair: Kazuya Tanigawa (Hiroshima City Univ.)
14:30 - 15:20 |
| (8) |
14:30-14:55 |
ZYNQ CLUSTER FOR CFD PARAMETRIC SURVEY |
Naru Sugimoto, Hideharu Amano (Keio Univ.) |
| (9) |
14:55-15:20 |
Overview of the Reconfigurable Virtual Accelerator ReVA |
Hironori Nakajo, Yuki Oigo (TUAT), Shozo Takeoka (AXE), Masashi Takemoto (BeatCraft), Takefumi Miyoshi (Wasalabo) |
Fri, Sep 18 PM
Chair: Masato Motomura (Hokkaido Univ.)
15:40 - 16:30 |
| (10) |
15:40-16:30 |
[Invited Talk]
Measurements and Optimal Controls of Plant Responses based on a SPA (Speaking Plant Approach) |
Tetsuo Morimoto (Ehime Univ.) |
Sat, Sep 19 AM
Chair: Takefumi Miyoshi (e-trees.Japan)
09:30 - 10:20 |
| (11) |
09:30-09:55 |
Proposal of small reconfigurable device SePLD using selector |
Keisuke Yamamoto, Kazuya Tanigawa, Tetsuo Hironaka (Hiroshima City Univ.), Takashi Ishiguro (Taiyo Yuden) |
| (12) |
09:55-10:20 |
Recovery method of radiation-damaged optically reconfigurable gate arrays |
Tomoya Akabe, Minoru Watanabe (Shizuoka Univ.) |
Sat, Sep 19 AM
Chair: Yuichiro Shibata (Nagasaki Univ.)
10:30 - 11:45 |
| (13) |
10:30-10:55 |
A Design Method Using Discrete Particle Swarm Optimization for a Deep Neural Network Based on Nested RNS |
Tatsuya Ogawa, Hiroki Nakahara (Ehime Univ.), Tsutomu Sasao (Meiji Univ.) |
| (14) |
10:55-11:20 |
An Implementation of AND-EXOR Programmable Logic Arrays Using FPGA primitives |
Takahiro Shinohara, Hiroki Nakahara (Ehime Univ.), Tsutomu Sasao (Meiji Univ.) |
| (15) |
11:20-11:45 |
An Approach with DSL for Building up FPGA Primitives |
Takefumi Miyoshi (WasaLabo/e-tress), Satoshi Funada (e-trees) |
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