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Special Interest Group on System and LSI Design Methodology (IPSJ-SLDM) [schedule] [select]
Chair Masahiro Fukui (Ritsumeikan Univ.)
Secretary Kotaro Shimamura (Hitachi), Makoto Sugihara (Kyushu Univ.), Masao Yokoyama (Sharp)

Technical Committee on Computer Systems (CPSY) [schedule] [select]
Chair Tsutomu Yoshinaga (Univ. of Electro-Comm.)
Vice Chair Akira Asato (Fujitsu), Yasuhiko Nakajima (NAIST)
Secretary Koji Nakano (Hiroshima Univ.), Hidetsugu Irie (Univ. of Electro-Comm.)
Assistant Hiroaki Inoue (NEC), Takeshi Ohkawa (Utsunomiya Univ.)

Technical Committee on Dependable Computing (DC) [schedule] [select]
Chair Nobuyasu Kanekawa (Hitachi)
Vice Chair Michiko Inoue (NAIST)
Secretary Koji Iwata (RTRI), Tatsuhiro Tsuthiya (Osaka Univ.)

Special Interest Group on Embedded Systems (IPSJ-EMB) [schedule] [select]

{INFOMESITEM}
Conference Date Fri, Mar 6, 2015 13:00 - 18:20
Sat, Mar 7, 2015 08:30 - 16:30
Topics  
Conference Place  
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)

Fri, Mar 6 PM  FPGA
13:00 - 14:40
(1)
CPSY
13:00-13:25 A Case for Accelerating Data Structure Sever using FPGA NIC CPSY2014-162 DC2014-88 Yuta Tokusashi, Hiroki Matsutani (Keio Univ.)
(2)
CPSY
13:25-13:50 Implementation evaluation of in-vehicle encrypted CAN communication and replay attack countermeasure technique CPSY2014-163 DC2014-89 Masashi Nakano, Takaya Kubota, Mitsuru Shiozaki, Takeshi Fujino (Ritsumeikan Univ.)
(3)
CPSY
13:50-14:15 A HW/SW Cooperative System Design of Stabilization Processing of Images from Networked Cameras for the Realization of an Automatic Watch System for Safe Navigation CPSY2014-164 DC2014-90 Takeshi Ohkawa (Utsunomiya Univ.), Yohei Matsumoto (Tokyo Marine Univ.), Manabu Inagawa (IDi), Daichi Uetake, Mayu Fusegi, Kanemitsu Ootsu, Takashi Yokota (Utsunomiya Univ.)
(4)
CPSY
14:15-14:40 Advice : An application design environment for various parallel processing hardware CPSY2014-165 DC2014-91 Naomichi Furushima, Nobuya Watanabe, Akira Nagoya (Okayama Univ.)
  14:40-14:50 Break ( 10 min. )
Fri, Mar 6 PM  Processors
14:50 - 16:30
(5)
CPSY
14:50-15:15 A Resource Utilization Aware Method to Improve Throughput on RMT Processor CPSY2014-166 DC2014-92 Taro Murata, Kensuke Kaneda, Masayoshi Takasu, Keigo Mizotani, Yusuke Hatori, Nobuyuki Yamasaki (Keio Univ.)
(6)
CPSY
15:15-15:40 Adaptive Error Correcting Code by Priority on RMT Processor CPSY2014-167 DC2014-93 Tsukasa Matsui, Shuma Hagiwara, Keigo Mizotani, Nobuyuki Yamasaki (Keio Univ.)
(7)
CPSY
15:40-16:05 Development of soft macro processor for embedded system CPSY2014-168 DC2014-94 Tomoyuki Sugiyama, Takahiro Sasaki, Toshio Kondo (Mie Univ.)
(8)
CPSY
16:05-16:30 A proposal of placement optimization algorithm by introducing TSV module CPSY2014-169 DC2014-95 Atsushi Murata, Tomohiro Inaba, Masato Yoshimi, Hidetsugu Irie, Tsutomu Yoshinaga (UEC)
  16:30-16:40 Break ( 10 min. )
Fri, Mar 6 PM  Software
16:40 - 18:20
(9)
CPSY
16:40-17:05 An Algorithm to Reduce Components of a Gaussian Mixture Model Considering Distribution Shape of Each Component CPSY2014-170 DC2014-96 Naoya Yokoyama, Shuji Tsukiyama (Chuo Univ.), Masahiro Fukui (Ritsumeikan Univ.)
(10)
CPSY
17:05-17:30 Development of Introductory Learning Material for Embedded Systems using Plarail CPSY2014-171 DC2014-97 Takashi Kawanami, Shunpei Kaji, Daisuke Takago, Ryoko Hayashi (KIT)
(11)
CPSY
17:30-17:55 A Trial Investigation System for Vulnerability on M2M Network CPSY2014-172 DC2014-98 Kiyotaka Atsumi (ka-lab)
(12)
CPSY
17:55-18:20 Prevention Peeping System by coordinating LED Light with Smartphones CPSY2014-173 DC2014-99 Kouhei Sugiyama, Kyosuke Kageyama, Takeshi Kumaki, Takeshi Fujino (Ritsumei Univ.)
Sat, Mar 7 AM  Power Saving 1
08:30 - 10:10
(13)
CPSY
08:30-08:55 Power optimization of low-power reconfigurable accelerator CMA-SOTB CPSY2014-174 DC2014-100 Yu Fujita, Hayate Okuhara, Koichiro Masuyama, Hideharu Amano (Keio Univ.)
(14)
CPSY
08:55-09:20 Improvements and evaluation of bias circuit control for CMOS analog circuit CPSY2014-175 DC2014-101 Ryohei Hori (Ritsumeikan Univ.), Toshio Kumamoto (OSU), Masayoshi Shirahata, Takeshi Fujino (Ritsumeikan Univ.)
(15)
CPSY
09:20-09:45 A Study on a Power Efficient Neurochip with Non-Volatile Memory CPSY2014-176 DC2014-102 Jun Tomii, Masaaki Kondo, Hiroshi Nakamura (Univ. Tokyo)
(16)
CPSY
09:45-10:10 Energy Reduction of BTB by focusing on Number of Branches per Cache Line CPSY2014-177 DC2014-103 Hiroki Yamamoto, Ryotaro Kobayashi (TUT), Hajime Shimada (NU)
  10:10-10:20 Break ( 10 min. )
Sat, Mar 7 AM  Power Saving 2
10:20 - 12:00
(17)
CPSY
10:20-10:45 Dynamic Scheduling Algorithm for Automatically Parallelized and Power Reduced Applications on Multicore Systems CPSY2014-178 DC2014-104 Takashi Goto, Kohei Muto, Tomohiro Hirano, Hiroki Mikami (Waseda Univ.), Uichiro Takahashi, Sakae Inoue (Fujitsu), Keiji Kimura, Hironori Kasahara (Waseda Univ.)
(18)
CPSY
10:45-11:10 Real-Time Static Voltage and Frequency Scaling on RMT Processor with Instructions Per Clock Cycle Control CPSY2014-179 DC2014-105 Kenji Yamada, Yusuke Hatori, Shuma Hagiwara, Keigo Mizotani, Masayoshi Takasu, Nobuyuki Yamasaki (Keio Univ.)
(19) 11:10-11:35  
(20) 11:35-12:00  
  12:00-13:00 Lunch Break ( 60 min. )
Sat, Mar 7 PM 
13:00 - 14:40
(21)
DC
13:00-13:25 Study of Cost Reduction Technique for FPGA-based Control Systems by Quantitative Evaluation of Dangerous Failure Ratio CPSY2014-180 DC2014-106 Teppei Hirotsu, Tadanobu Toba (Hitachi)
(22)
DC
13:25-13:50 Design and Evaluation of a Floating-point Multiplier with Online Error Detection by Partial Duplication CPSY2014-181 DC2014-107 Nobutaka Kito (Chukyo Univ.), Kazushi Akimoto, Naofumi Takagi (Kyoto Univ.)
(23)
DC
13:50-14:15 File access analysis method by hardware monitoring of disk I/O CPSY2014-182 DC2014-108 Kenji Toda, Kazukuni Kobara (AIST)
(24)
DC
14:15-14:40 Speed Up co-Simulation for Verification of Embedded Systems CPSY2014-183 DC2014-109 Hiroaki Nakata, Kenta Morishima, Yasuo Sugure (Hitachi)
  14:40-14:50 Break ( 10 min. )
Sat, Mar 7 PM 
14:50 - 16:30
(25) 14:50-15:15  
(26) 15:15-15:40  
(27) 15:40-16:05  
(28) 16:05-16:30  
Fri, Mar 6 PM 
13:00 - 14:40
(29) 13:00-13:25  
(30) 13:25-13:50  
(31) 13:50-14:15  
(32) 14:15-14:40  
  14:40-14:50 Break ( 10 min. )
Fri, Mar 6 PM 
14:50 - 16:30
(33) 14:50-15:15  
(34) 15:15-15:40  
(35) 15:40-16:05  
(36) 16:05-16:30  
  16:30-16:40 Break ( 10 min. )
Fri, Mar 6 PM 
16:40 - 18:20
(37) 16:40-17:05  
(38) 17:05-17:30  
(39) 17:30-17:55  
(40) 17:55-18:20  
Sat, Mar 7 AM 
08:30 - 10:10
(41) 08:30-08:55  
(42) 08:55-09:20  
(43) 09:20-09:45  
(44) 09:45-10:10  
  10:10-10:20 Break ( 10 min. )
Sat, Mar 7 AM 
10:20 - 12:00
(45) 10:20-10:45  
(46) 10:45-11:10  
(47) 11:10-11:35  
(48) 11:35-12:00  
  12:00-13:00 Lunch Break ( 60 min. )
Sat, Mar 7 PM 
13:00 - 14:40
(49) 13:00-13:25  
(50) 13:25-13:50  
(51) 13:50-14:15  
(52) 14:15-14:40  
  14:40-14:50 Break ( 10 min. )
Sat, Mar 7 PM 
14:50 - 16:30
(53) 14:50-15:15  
(54) 15:15-15:40  
(55) 15:40-16:05  
(56) 16:05-16:30  

Announcement for Speakers
General TalkEach speech will have 20 minutes for presentation and 5 minutes for discussion.

Contact Address and Latest Schedule Information
IPSJ-SLDM Special Interest Group on System and LSI Design Methodology (IPSJ-SLDM)   [Latest Schedule]
Contact Address Makoto Sugihara (Kyushu University)
E sldm2013caitkshu-u 
Announcement Please see the IPSJ-SLDM page below:
http://www.sig-sldm.org/
CPSY Technical Committee on Computer Systems (CPSY)   [Latest Schedule]
Contact Address Akira ASATO (FUJITSU)
TEL +81-44-754-3233, FAX +81-44-754-3214
E-: a 
DC Technical Committee on Dependable Computing (DC)   [Latest Schedule]
Contact Address  
IPSJ-EMB Special Interest Group on Embedded Systems (IPSJ-EMB)   [Latest Schedule]
Contact Address  


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