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Technical Committee on Integrated Circuits and Devices (ICD) [schedule] [select]
Chair Minoru Fujishima (Hiroshima Univ.)
Vice Chair Hideto Hidaka (Renesas)
Secretary Takeshi Yoshida (Hiroshima Univ.)
Assistant Makoto Takamiya (Univ. of Tokyo), Hiroe Iwasaki (NTT), Takashi Hashimoto (Panasonic), Hiroyuki Ito (Tokyo Inst. of Tech.), Pham Konkuha (Univ. of Electro-Comm.)

Technical Committee on Silicon Device and Materials (SDM) [schedule] [select]
Chair Yuzou Oono (Univ. of Tsukuba)
Vice Chair Tatsuya Kunikiyo (Renesas)
Secretary Rihito Kuroda (Tohoku Univ.)
Assistant Tadashi Yamaguchi (Renesas)

Conference Date Mon, Aug 24, 2015 09:30 - 18:25
Tue, Aug 25, 2015 09:30 - 14:50
Topics Low voltage/low power techniques, novel devices, circuits, and applications 
Conference Place  
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (No. 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)

Mon, Aug 24 AM 
09:30 - 18:25
(1) 09:30-10:20 [Invited Talk]
Highly Reliable TaOx ReRAM with Centralized Filament for 28-nm Embedded Application SDM2015-57 ICD2015-26
Yukio Hayakawa, Atsushi Himeno, Ryutaro Yasuhara, Satoru Fujii, Satoru Ito, Yoshio Kawashima, Yuuichirou Ikeda, Akifumi Kawahara, Ken Kawai, Zhiqiang Wei, Shunsaku Muraoka, Kazuhiko Shimakawa, Takumi Mikawa, Shinichi Yoneda (Panasonic)
(2) 10:20-10:45 Development of a compacted doubly nesting array in Narrow Scribe Line aimed at detecting soft failures of interconnect via SDM2015-58 ICD2015-27 Hiroki Shinkawata, Nobuo Tsuboi (REL), Atsushi Tsuda (RSD), Shingo Sato (Kansai), Yasuo Yamaguchi (REL)
  10:45-10:55 Break ( 10 min. )
(3) 10:55-11:45 [Invited Talk]
Implementation of TFET Spice Model for Ultra-Low Power Circuit Analysis SDM2015-59 ICD2015-28
Chika Tanaka, Akira Hokazono, Kanna Adachi, Masakazu Goto, Yoshiyuki Kondo, Emiko Sugizaki, Motohiko Fujimatsu, Hiroyuki Hara, Shinji Miyano, Keiichi Kushida, Shigeru Kawanaka (Toshiba)
(4) 11:45-12:35 [Invited Talk]
Device Design Guideline for negative capacitance FET (NCFET) SDM2015-60 ICD2015-29
Masaharu Kobayashi, Toshiro Hiramoto (The Univ. of Tokyo)
  12:35-13:35 Lunch Break ( 60 min. )
(5) 13:35-14:25 [Invited Talk]
Atom-Switch-Based Programmable Logic Array and ROM SDM2015-61 ICD2015-30
Yukihide Tsuji, X Bai, Makoto Miyamura, Toshitsugu Sakamoto, Munehiro Tada, Naoki Banno, Koichiro Okamoto, Noriyuki Iguchi (NEC), Nobuyuki Sugii (Hitachi), Hiromitsu Hada (NEC)
(6) 14:25-14:50 Digital Frequency Transformaion Circuit for Timewise Unequally Sampled Data SDM2015-62 ICD2015-31 Yuu Tanaka, Weikun Liang, Yoshiaki Hagiwara (Sojo-u)
  14:50-15:00 Break ( 10 min. )
(7) 15:00-15:50 [Invited Talk]
Recent progress and challenges of high-mobility III-V/Ge CMOS technologies for low power LSI applications SDM2015-63 ICD2015-32
Toshifumi Irisawa (AIST), Keiji Ikeda, Yuuichi Kamimuta, Minoru Oda, Tsutomu Tezuka (AIST/Toshiba), Tatsurou Maeda, Hiroyuki Ota, Kazuhiko Endo (AIST)
(8) 15:50-16:15 Area and Performance Study of FinFET with Detailed Parasitic Capacitance Analysis in 16nm Process Node SDM2015-64 ICD2015-33 Takeshi Okagaki, Koji Shibutani, Masao Morimoto, Yasumasa Tsukamoto, Koji Nii, Kazunori Onozawa (REL)
  16:15-16:25 Break ( 10 min. )
(9) 16:25-18:25  
Tue, Aug 25 AM 
09:30 - 14:50
(10) 09:30-10:20 [Invited Talk]
Low-Power Embedded ReRAM Technology for IoT Applications SDM2015-65 ICD2015-34
Makoto Ueki, Akira Tanabe, Hiroshi Sunamura, Mitsuru Narihiro, Kazuya Uejima, Koji Masuzaki, Naoya Furutake, Akira Mitsuiki, Koichi Takeda, Takashi Hase, Yoshihiro Hayashi (Renesas Electronics)
(11) 10:20-10:45 Circuit Design of Reconfigurable Dynamic Logic and Estimation of Number of Elements SDM2015-66 ICD2015-35 Junki Kato, Shigeyoshi Watanabe, Hiroshi Ninomiya, Manabu Kobayashi, Yasuyuki Miura (SIT)
  10:45-10:55 Break ( 10 min. )
(12) 10:55-11:45 [Invited Talk]
Novel Single p+Poly-Si/Hf/SiON Gate Stack Technology on Silicon-on-Thin-Buried-Oxide (SOTB) for Ultra-Low Leakage Applications SDM2015-67 ICD2015-36
Yoshiki Yamamoto, Hideki Makiyama, Tomohiro Yamashita, Hidekazu Oda, Shiro Kamohara, Yasuo Yamaguchi (Renesas Electronics Corp.), Nobuyuki Sugii (Hitachi), Tomoko Mizutani, Masaharu Kobayashi, Toshiro Hiramoto (UT)
(13) 11:45-12:10 Threshold Voltage and Current Variability of Extremely Narrow Silicon Nanowire MOSFETs with Width down to 2nm SDM2015-68 ICD2015-37 Tomoko Mizutani, Yuma Tanahashi, Ryota Suzuki, Takuya Saraya, Masaharu Kobayashi, Toshiro Hiramoto (Univ. of Tokyo)
  12:10-13:10 Lunch Break ( 60 min. )
(14) 13:10-14:00 [Invited Talk]
45.5% Energy Reduction by applying DVFS and Multi-Level-Shift Architecture for Low-Power SoCs SDM2015-69 ICD2015-38
Satoshi Tanabe, Atsushi Muramatsu, Ken-ichi Kawasaki, Makoto Mouri, Teruo Ishihara (Flab)
(15) 14:00-14:50 [Invited Talk]
A 25Gb/s Hybrid Integrated Silicon Photonic Transceiver in 28nm CMOS and SOI SDM2015-70 ICD2015-39
Toshihiko Mori, Yanfei Chen, Masaya Kibune (Fujitsu Lab.), Asako Toda (Fujitsu Lab. America), Akinori Hayakawa, Tomoyuki Akiyama, Shigeaki Sekiguchi, Hiroji Ebe, Nobuhiro Imaizumi, Tomoyuki Akahoshi (Fujitsu Lab.), Suguru Aiyama, Shinsuke Tanaka, Takasi Simoyama (PETRA), Ken Morito (Fujitsu Lab.), Takuji Yamamoto (Fujitsu Lab. America)

Announcement for Speakers
General TalkEach speech will have 20 minutes for presentation and 5 minutes for discussion.
Invited TalkEach speech will have 40 minutes for presentation and 10 minutes for discussion.

Contact Address and Latest Schedule Information
ICD Technical Committee on Integrated Circuits and Devices (ICD)   [Latest Schedule]
Contact Address  
SDM Technical Committee on Silicon Device and Materials (SDM)   [Latest Schedule]
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Last modified: 2015-06-30 15:07:42


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