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| Chair |
|
Masao Nakaya |
| Vice Chair |
|
Akira Matsuzawa |
| Secretary |
|
Koji Kai, Yoshiharu Aimoto |
| Assistant |
|
Makoto Nagata, Minoru Fujishima |
|
| Conference Date |
Thu, May 31, 2007 10:30 - 17:45
Fri, Jun 1, 2007 10:30 - 17:45 |
| Topics |
Creative Collaboration between Circuit and Architecture: Processor, Memory and SOC |
| Conference Place |
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Copyright
and
reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
Thu, May 31 AM
10:30 - 12:00 |
| (1) |
10:30-11:00 |
Promotion of drowsy cache efficiency |
Keni-chiro Ishikawa (Keio Univ.) |
| (2) |
11:00-11:30 |
A Study on Control Scheme of Awake Time in Drowsy Caches |
Ryotaro Kobayashi, Hideki Taniguchi, Toshio Shimada (Nagoya Univ.) |
| (3) |
11:30-12:00 |
The Potential of Temperature-Aware Configurable Cache on Energy Reduction |
Hamid Noori, Maziar Goudarzi, Koji Inoue, Kazuaki Murakami (Kyushu Univ.) |
| |
12:00-13:15 |
Lunch ( 75 min. ) |
Thu, May 31 PM
13:15 - 14:45 |
| (4) |
13:15-13:45 |
Effect of Data Prefetching on Chip MultiProcessor |
Naoto Fukumoto, Tomonobu Mihara, Koji Inoue, Kazuaki Murakami (Kyushu Univ.) |
| (5) |
13:45-14:15 |
Mutligrain Parallel Processing in SMP Execution Mode on a Multicore for Consumer Electronics |
Masayoshi Mase, Daisuke Baba, Harumi Nagayama, Hiroaki Tano, Takeshi Masuura, Takamichi Miyamoto, Jun Shirako, Hirofumi Nakano, Keiji Kimura (Waseda Univ.), Tatsuya Kamei, Toshihiro Hattori, Atsushi Hasegawa (Renesas Technology), Masaki Ito, Makoto Satoh, Kunio Uchiyama (Hitachi Ltd.) |
| (6) |
14:15-14:45 |
A 4320MIPS Four-Processor Core SMP/AMP with Individually Managed Clock Frequency for Low Power Consumption  ICD2007-22 |
Kiyoshi Hayase, Yutaka Yoshida, Tatsuya Kamei, Shinichi Shibahara, Osamu Nishii, Toshihiro Hattori, Atsushi Hasegawa (Renesas technology), Masashi Takada, Naohiko Irie, Kunio Uchiyama, Toshihiko Odaka (Hitachi Ltd.), Kiwamu Takada (Hitachi ULSI Systems Co. Ltd.), Keiji Kimura, Hironori Kasahara (Waseda Univ.) |
| |
14:45-15:00 |
Break ( 15 min. ) |
Thu, May 31 PM
15:00 - 16:00 |
| (7) |
15:00-16:00 |
[Invited Talk]
The challenge of continually increasing computer power |
Aiichiro Inoue (Fujitsu) |
| |
16:00-16:15 |
Break ( 15 min. ) |
Thu, May 31 PM
16:15 - 17:45 |
| (8) |
16:15-16:45 |
Improving Energy-efficiency of Canary-based DVS system |
Toshinori Sato (Kyushu Univ), Yuji Kunitake (Kyushu Inst Tech) |
| (9) |
16:45-17:15 |
A fine grain dynamic sleep control scheme in MIPS R3000 |
Naomi Seki, Yohei Hasegawa, Hideharu Amano (Keio Univ.), Naoaki Ohkubo, Seidai Takeda, Toshihiro Kashima, Toshiaki Shirai, Kimiyoshi Usami (Shibaura Inst. Tech.), Masaaki Kondo, Hiroshi Nakamura (U. of Tokyo) |
| (10) |
17:15-17:45 |
A high-throughput, low-power FFT circuits for OFDM based wireless communication systems ICD2007-26 |
Shinsuke Ushiki, Kazunori Shimizu, Koichi Nakamura, Satoshi Goto, Takeshi Ikenaga (Waseda Univ.) |
| |
17:45-20:00 |
( 135 min. ) |
Fri, Jun 1 AM
10:30 - 12:00 |
| (11) |
10:30-11:00 |
Fast, Accurate Cache Simulation |
Takatsugu Ono, Koji Inoue, Kazuaki Murakami (Kyushu Univ.) |
| (12) |
11:00-11:30 |
Design Techniques of Wave Pipelines ICD2007-28 |
Masa-aki Fukase, Tomoaki Sato (Hirosaki Univ.) |
| (13) |
11:30-12:00 |
Evaluation of "Write Assurance Buffer" for Dynamic Timing-error Detection |
Hidetsugu Irie (JST), Ken Sugimoto, Masahiro Goshima, Shuichi Sakai (Univ. of Tokyo) |
| |
12:00-13:15 |
Lunch ( 75 min. ) |
Fri, Jun 1 PM
13:15 - 14:45 |
| (14) |
13:15-13:45 |
The Concept of Innovative Power Control for Ultra Low-Power and High-Performance System LSIs |
Hiroshi Nakamura (Univ. of Tokyo), Hideharu Amano (Keio Univ.), Kimiyoshi Usami (Shibaura Inst. Tech.), Mitaro Namiki (TUAT), Masashi Imai, Masaaki Kondo (Univ. of Tokyo) |
| (15) |
13:45-14:15 |
GA-Based Assignment of Supply and Threshold Voltages and Interconnection Simplification for Low Power VLSI Design ICD2007-31 |
Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama (Tohoku Univ.) |
| (16) |
14:15-14:45 |
The Dynamic Instruction Scheduler for ALU Cascading |
Kosuke Ogata, Jun Yao, Shinobu Miwa, Hajime Shimada, Shinji Tomita (Kyoto Univ.) |
| |
14:45-15:00 |
Break ( 15 min. ) |
Fri, Jun 1 PM
15:00 - 16:00 |
| (17) |
15:00-16:00 |
[Invited Talk]
Architecture of the Highly Parallel Array Processor IMAPCAR and its technology perspective |
Shorin Kyo (NEC) |
| |
16:00-16:15 |
Break ( 15 min. ) |
Fri, Jun 1 PM
16:15 - 17:45 |
| (18) |
16:15-16:45 |
Design of a highly parallel VLSI processor based on functional-unit-level packet data transfer scheme ICD2007-34 |
Yoshichika Fujioka, Nobuhiro Tomabechi (Hachinohe Inst. Tech.), Michitaka Kameyama (Tohoku Univ.) |
| (19) |
16:45-17:15 |
Crossbar-Connected Multi-Layer Topologies for 3-D Network-on-Chips |
Hiroki Matsutani (Keio Univ.), Michihiro Koibuchi (NII), Hideharu Amano (Keio Univ.) |
| (20) |
17:15-17:45 |
On-chip Network Architecture for Large Scale Reconfigurable Datapath ICD2007-36 |
Keita Shimasaki, Takaaki Nagano, Hiroaki Honda, Farhad Mehdipour, Koji Inoue, Kazuaki Murakami (Kyushu Univ.) |
| Contact Address and Latest Schedule Information |
| ICD |
Technical Committee on Integrated Circuits and Devices (ICD) [Latest Schedule]
|
| Contact Address |
|
| IPSJ-ARC |
Special Interest Group on Computer Architecture (IPSJ-ARC) [Latest Schedule]
|
| Contact Address |
|
Last modified: 2010-10-12 10:06:42
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