Thu, Jan 27 PM
13:00 - 15:00 |
| (1) |
13:00-13:30 |
Analysis method of LSI open failure point |
Yasumaro Komiya, Shuji Kikuchi (PERL), Akira Shimase, Kazuya Mukogawa (Renesas) |
| (2) |
13:30-14:00 |
Evaluation of LVP observability in 90nm devices, and development of on-chip elements for LVP measurement |
Junpei Nonaka, Shinichi Wada (NEC Electronics) |
| (3) |
14:00-14:30 |
High-resolution failure analysis with SIL plate |
Takeshi Yoshida, Thoru Koyama, Junko Komori, Yoji Mashiko (Renesas) |
| (4) |
14:30-15:00 |
Observation of completed LSI after building-in defect using Laser-SQUID microscopy |
Tetsuya Sakai, Kiyoshi Nikawa (NEC Electronics) |
| |
15:00-15:15 |
Break ( 15 min. ) |
Thu, Jan 27 PM
15:15 - 17:15 |
| (5) |
15:15-16:15 |
[Special Invited Talk]
Current challenges and the future of evaluation analysis technology of ULSI
-- The technology as a lifeline of LSI in the future -- |
Yoji Mashiko (Renesas) |
| (6) |
16:15-16:45 |
Observation of MOSFETs using laser THz-emission microscope |
Masatsugu Yamashita, Kodo Kawase, Chiko Otani (RIKEN), Kiyoshi Nikawa (NEC Electron.), Masayoshi Tonouchi (Osaka Univ.) |
| (7) |
16:45-17:15 |
The Study of An-Ag-X Lead Free Solders for High Reliability |
Masazumi Amagai (TI Japan), Tsukasa Ohnishi, (SMI) |
Fri, Jan 28 AM
09:00 - 10:30 |
| (8) |
09:00-09:30 |
10Gbps Serial Links Prototype for Server and Router |
Masayoshi Yagyu, Hiroki Yamashita, Fumio Yuki, Tatsuya Kawasimo (CRL, Hitachi), Yasuhiro Hujimura (MDD, Hitachi), Yoshihumi Takada (ESD, Hitachi) |
| (9) |
09:30-10:00 |
High reliability assurance method and its apprication on high density and large pin-count package |
Syuhei Hashimoto, Yassumasa Kawaguchi, Minoru Hanyu, Toshihiro Matsunaga, Mitsuhisa Matsuo, Naoko Kawatani, Yasuhisa Higuchi, Takahiko Takahashi (Hitachi,LTD MDD) |
| (10) |
10:00-10:30 |
Post-Packaging Auto Repair Techniques For Fast Row Cycle Embedded DRAM |
Atsushi Nakayama, Toshimasa Namekawa, Hiroshi Ito, Osamu Wada, Shuso Fujii (TOSHIBA Corp.) |
| |
10:30-10:45 |
Break ( 15 min. ) |
Fri, Jan 28 AM
10:45 - 12:15 |
| (11) |
10:45-11:15 |
Investigation of diagnostic methods for analog circuits |
Norio Kuji (Hachinohe C. T.) |
| (12) |
11:15-11:45 |
Improvement of RTL Fault Diagnosis Technology for Practical Use |
Masafumi Nikaido, Yukihisa Funatsu (NEC Electronics Corporation) |
| (13) |
11:45-12:15 |
On Observability Quantification for Fault Diagnosis of VLSI Circuits |
Naoya Toyota, Seiji Kajihara, Xiaoqing Wen (KIT), Masaru Sanada (NEC Electoronics) |
| |
12:15-13:30 |
Lunch Break ( 75 min. ) |
Fri, Jan 28 PM
13:30 - 15:30 |
| (14) |
13:30-14:00 |
A decompressor with buffer for test compression / decompression |
Michihiro, Masakuni Ochi, Hideyuki Ichihara, Tomoo Inoue (Hiroshima City Univ.) |
| (15) |
14:00-14:30 |
On Finding Don't Cares in Test Sequences for Sequential Circuits and Applications to Test Compaction and Power Reduction |
Yoshinobu Higami (Ehime Univ.), Seiji Kajihara (Kyushu Inst. Tech.), Shin-ya Kobayashi, Yuzo Takamatsu (Ehime Univ.) |
| (16) |
14:30-15:00 |
LSI fault diagnosis by using functional test result and netlist extracted from CAD layout data |
Katsuyoshi Miura, Koji Nakamae, Hiromu Fujioka (Osaka Univ.) |
| (17) |
15:00-15:30 |
Selection of Seeds and Phase Shifters for Scan BIST |
Masayuki Arai, Harunobu Kurokawa, Kenichi Ichino, Satoshi Fukumoto, Kazuhiko Iwasaki (Tokyo Metro. Univ.) |
| |
15:30-15:45 |
Break ( 15 min. ) |
Fri, Jan 28 PM
15:45 - 17:15 |
| (18) |
15:45-16:15 |
Learning-Based Improvement in Fault Tolerance of Hopfield Associative Memories |
Naotake Kamiura, Teijiro Isokawa, Nobuyuki Matsui (Univ. of Hyogo) |
| (19) |
16:15-16:45 |
New SoC Testing technologies for beyond 65nm process rule
-- New Failure Analysis and Testing methodologies for low-k/Cu Interconnect technique -- |
Makoto Yamazaki, Yasuo Furukawa (ADVANTEST) |
| (20) |
16:45-17:15 |
Development of Multiple Fault Diagnosis Based on Path-Tracing for Logic LSIs |
Yukihisa Funatsu, Hiroshi Sumitomo, Kazuki Shigeta, Toshio Ishiyama (NECEL) |
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