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Technical Committee on Integrated Circuits and Devices (ICD)
Chair: MIchitaka Kameyama Vice Chair: Masao Nakaya
Secretary: Kunio Uchiyama, Shinji Miyano
Assistant: Masanori Hariyama, Koji Kai

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Technical Committee on Component Parts and Materials (CPM)
Chair: Yoichi Hoshi Vice Chair: Kiyoshi Ishii
Secretary: Kazuo Fujiura, Yoshitaka Kitamoto
Assistant: Toru Matsuura

DATE:
Thu, Jan 27, 2005 13:00 - 17:15
Fri, Jan 28, 2005 09:00 - 17:15

PLACE:
(芝公園,東京タワー向かい)

TOPICS:


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Thu, Jan 27 PM (13:00 - 15:00)
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(1) 13:00 - 13:30
Analysis method of LSI open failure point
Yasumaro Komiya, Shuji Kikuchi (PERL), Akira Shimase, Kazuya Mukogawa (Renesas)

(2) 13:30 - 14:00
Evaluation of LVP observability in 90nm devices, and development of on-chip elements for LVP measurement
Junpei Nonaka, Shinichi Wada (NEC Electronics)

(3) 14:00 - 14:30
High-resolution failure analysis with SIL plate
Takeshi Yoshida, Thoru Koyama, Junko Komori, Yoji Mashiko (Renesas)

(4) 14:30 - 15:00
Observation of completed LSI after building-in defect using Laser-SQUID microscopy
Tetsuya Sakai, Kiyoshi Nikawa (NEC Electronics)

----- Break ( 15 min. ) -----

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Thu, Jan 27 PM (15:15 - 17:15)
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(5) 15:15 - 16:15
[Special Invited Talk]
Current challenges and the future of evaluation analysis technology of ULSI
-- The technology as a lifeline of LSI in the future --
Yoji Mashiko (Renesas)

(6) 16:15 - 16:45
Observation of MOSFETs using laser THz-emission microscope
Masatsugu Yamashita, Kodo Kawase, Chiko Otani (RIKEN), Kiyoshi Nikawa (NEC Electron.), Masayoshi Tonouchi (Osaka Univ.)

(7) 16:45 - 17:15
The Study of An-Ag-X Lead Free Solders for High Reliability
Masazumi Amagai (TI Japan), Tsukasa Ohnishi, (SMI)

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Fri, Jan 28 AM (09:00 - 10:30)
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(8) 09:00 - 09:30
10Gbps Serial Links Prototype for Server and Router
Masayoshi Yagyu, Hiroki Yamashita, Fumio Yuki, Tatsuya Kawasimo (CRL, Hitachi), Yasuhiro Hujimura (MDD, Hitachi), Yoshihumi Takada (ESD, Hitachi)

(9) 09:30 - 10:00
High reliability assurance method and its apprication on high density and large pin-count package
Syuhei Hashimoto, Yassumasa Kawaguchi, Minoru Hanyu, Toshihiro Matsunaga, Mitsuhisa Matsuo, Naoko Kawatani, Yasuhisa Higuchi, Takahiko Takahashi (Hitachi,LTD MDD)

(10) 10:00 - 10:30
Post-Packaging Auto Repair Techniques For Fast Row Cycle Embedded DRAM
Atsushi Nakayama, Toshimasa Namekawa, Hiroshi Ito, Osamu Wada, Shuso Fujii (TOSHIBA Corp.)

----- Break ( 15 min. ) -----

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Fri, Jan 28 AM (10:45 - 12:15)
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(11) 10:45 - 11:15
Investigation of diagnostic methods for analog circuits
Norio Kuji (Hachinohe C. T.)

(12) 11:15 - 11:45
Improvement of RTL Fault Diagnosis Technology for Practical Use
Masafumi Nikaido, Yukihisa Funatsu (NEC Electronics Corporation)

(13) 11:45 - 12:15
On Observability Quantification for Fault Diagnosis of VLSI Circuits
Naoya Toyota, Seiji Kajihara, Xiaoqing Wen (KIT), Masaru Sanada (NEC Electoronics)

----- Lunch Break ( 75 min. ) -----

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Fri, Jan 28 PM (13:30 - 15:30)
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(14) 13:30 - 14:00
A decompressor with buffer for test compression / decompression
Michihiro, Masakuni Ochi, Hideyuki Ichihara, Tomoo Inoue (Hiroshima City Univ.)

(15) 14:00 - 14:30
On Finding Don't Cares in Test Sequences for Sequential Circuits and Applications to Test Compaction and Power Reduction
Yoshinobu Higami (Ehime Univ.), Seiji Kajihara (Kyushu Inst. Tech.), Shin-ya Kobayashi, Yuzo Takamatsu (Ehime Univ.)

(16) 14:30 - 15:00
LSI fault diagnosis by using functional test result and netlist extracted from CAD layout data
Katsuyoshi Miura, Koji Nakamae, Hiromu Fujioka (Osaka Univ.)

(17) 15:00 - 15:30
Selection of Seeds and Phase Shifters for Scan BIST
Masayuki Arai, Harunobu Kurokawa, Kenichi Ichino, Satoshi Fukumoto, Kazuhiko Iwasaki (Tokyo Metro. Univ.)

----- Break ( 15 min. ) -----

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Fri, Jan 28 PM (15:45 - 17:15)
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(18) 15:45 - 16:15
Learning-Based Improvement in Fault Tolerance of Hopfield Associative Memories
Naotake Kamiura, Teijiro Isokawa, Nobuyuki Matsui (Univ. of Hyogo)

(19) 16:15 - 16:45
New SoC Testing technologies for beyond 65nm process rule
-- New Failure Analysis and Testing methodologies for low-k/Cu Interconnect technique --
Makoto Yamazaki, Yasuo Furukawa (ADVANTEST)

(20) 16:45 - 17:15
Development of Multiple Fault Diagnosis Based on Path-Tracing for Logic LSIs
Yukihisa Funatsu, Hiroshi Sumitomo, Kazuki Shigeta, Toshio Ishiyama (NECEL)

# Information for speakers
General Talk (30分) will have 20 minutes for presentation and 10 minutes for discussion.
Special Invited Talk (60分) will have 50 minutes for presentation and 10 minutes for discussion.


=== Technical Committee on Integrated Circuits and Devices (ICD) ===
# FUTURE SCHEDULE:

Thu, Mar 10, 2005 - Fri, Mar 11, 2005: Mielparque Okinawa [Fri, Jan 14]
Thu, Apr 14, 2005 - Fri, Apr 15, 2005: [Mon, Feb 28]

# SECRETARY:
Kouji Kai (Matsushita)
TEL 0948-21-2625, FAX 0948-21-2620
E-mail: i-icdmlpac

=== Technical Committee on Component Parts and Materials (CPM) ===
# FUTURE SCHEDULE:

Fri, Apr 22, 2005: Kikai-Shinko-Kaikan Bldg. [Fri, Feb 18], Topics: Packaging and reliability of optical componetns, etc.

# SECRETARY:
Kazuo Fujiura (NTT Photonics Laboratories)
TFL046-240-4531,FAX046-240-4527
E-mail:uaecl


Last modified: 2004-11-25 15:57:15


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