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Technical Committee on Integrated Circuits and Devices (ICD) [schedule] [select]
Chair Masahiko Yoshimoto (Kobe Univ.)
Vice Chair Takeshi Yamamura (Fujitsu Labs.)
Secretary Toshimasa Matsuoka (Osaka Univ.), Ken Takeuchi (Chuo Univ.)
Assistant Osamu Watanabe (Toshiba), Shinichi Ouchi (AIST), Akira Tsuchiya (Kyoto Univ.)

Conference Date Mon, Dec 17, 2012 09:30 - 17:55
Tue, Dec 18, 2012 09:30 - 16:35
Topics  
Conference Place Royal Blue Hall, Tokyo Tech Front, Ookayama Campus, Tokyo Institute of Technology 
Address Tokyo Tech Front, 2-12-1 Ookayama, Meguro, Tokyo, Japan
Transportation Guide One-minit walk from Ookayama Station.
http://www.titech.ac.jp/english/about/campus/index.html
Sponsors This workshop is co-sponsored by IEEE SSCS Japan and Kansai Chapters.

Mon, Dec 17 AM 
09:30 - 10:45
(1) 09:30-10:20 [Invited Talk]
Future of Japanese LSI designers
-- A barren dessert or paradise --
Hideharu Amano (Keio Univ.)
(2) 10:20-10:45 Verification of an Estimation Method of Minimum Operation Voltage by Measurement Junya Kawashima, Hiroyuki Ochi, Hiroshi Tsutsui, Takashi Sato (Kyoto Univ.)
Mon, Dec 17 AM 
11:00 - 12:15
(3) 11:00-11:50 [Invited Talk]
Ambient Electronics using Flexible and Printed Electronics
-- Next-generation ICT and Medical --
Tsuyoshi Sekitani, Takao Someya (Univ. Tokyo)
(4) 11:50-12:15 An Analysis and Evaluation of MOSFET Strain Sensor Using Pseudo-Hall Effect Tetsuya Umetsu, Tomochika Harada, Sumio Okuyama, Koichi Matsushita (Yamagata Univ.)
Mon, Dec 17 PM 
13:30 - 14:45
(5) 13:30-14:20 [Invited Talk]
High-performance STT-MRAM and Its Integration for Embedded Application
Toshihiro Sugii, Yoshihisa Iba, Masaki Aoki, Hideyuki Noshiro, Koji Tsunoda, Akiyoshi Hatada, Masaaki Nakabayashi, Yuuichi Yamazaki, Atsushi Takahashi, Chikako Yoshida (LESP)
(6) 14:20-14:45 A 250Msps, 0.5W eDRAM-based Search Engine applying full-route capacity dedicated FIB application Yasuto Kuroda, Yuji Yano, Hisashi Iwamoto (Renesas), Koji Yamamoto (RDC), kazunari Inoue (Nara National College of Tech./Osaka Univ.)
Mon, Dec 17 PM 
14:55 - 15:40
(7) 14:55-15:40  
Mon, Dec 17 PM 
15:55 - 17:55
(8) 15:55-17:55 [Poster Presentation]
Instantaneous Heart Rate Detection Using Short-Time Autocorrelation for Wearable Healthcare Systems
Ken Yamashita, Masanao Nakano, Toshihiro Konishi, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.)
(9) 15:55-17:55 [Poster Presentation]
Single-Inductor, Dual-Output, Parallel-Boosting Architecture to Generate ReRAM and NAND Flash Memory Programming Voltages for 3D-Integrated Hybrid Solid-State Drives
Shoto Nakajima (Chuo Univ.), Teruyoshi Hatanaka (Chuo Univ./Univ. of Tokyo), Ken Takeuchi (Chuo Univ.)
(10) 15:55-17:55 [Poster Presentation]
Near Threshold Voltage Word-Line Voltage Injection Scheme for Self-Convergence of Threshold Voltage Variation in Local Electron Injected Asymmetric Pass Gate Transistor 6T-SRAM
Daisuke Kobayashi, Kousuke Miyaji (Chuo Univ.), Shinji Miyano (STARC), Ken Takeuchi (Chuo Univ.)
(11) 15:55-17:55 [Poster Presentation]
Analyses of Code Length Dependence of Asymmetric Code for Highly Reliable SSDs with 20-40nm NAND Flash Memories
Masafumi Doi (Chuo Univ.), Shuhei Tanakamaru (Chuo Univ./Univ. of Tokyo), Ken Takeuchi (Chuo Univ.)
(12) 15:55-17:55 [Poster Presentation]
A Hardware-Friendly Object Recognition Algorithm Using Log Polar Coordinate Transformation
Makoto Wada, Tadashi Shibata (UT)
(13) 15:55-17:55 [Poster Presentation]
A New Approach of the Analysis of the ISF in Oscillators with a Closed-Loop Control
Junki Mizuno, Tsutomu Yoshimura, Shuhei Iwade, Hiroshi Makino (OIT), Yoshio Matsuda (Kanazawa Univ.)
(14) 15:55-17:55 [Poster Presentation]
Low-Power Ferroelectric 6T4C Shadow SRAM for Normally-Off Computing
Tomoki Nakagawa, Shusuke Yoshimoto, Yuki Kitahara, Koji Yanagida, Yohei Umeki, Shunsuke Okumura, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.)
(15) 15:55-17:55 [Poster Presentation]
3x Write and 5x Read Speed Increase for RRAM with Disturb Free Bipolar Operation
Sheyang Ning (Chuo Univ./Univ. of Tokyo), Tomoko Ogura Iwasaki, Ken Takeuchi (Chuo Univ.)
(16) 15:55-17:55 [Poster Presentation]
Analysis of the Pull-in Range in a CDR-PLL with the Nonlinearity of the Phase Detector
Shinji Shimizu, Tsutomu Yoshimura, Shuhei Iwade, Hiroshi Makino (OIT), Yoshio Matsuda (Kanazawa Univ.)
(17) 15:55-17:55 [Poster Presentation]
A 2.4x-Real-Time VLSI Processor for 60-kWord Continuous Speech Recognition
Yuki Miyamoto, Guangji He, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ)
(18) 15:55-17:55 [Poster Presentation]
Hybrid ReRAM/MLC NAND SSDs with Data Fragmentation Suppression and Evaluation Platform
Shun Okamoto, Kousuke Miyaji, Koh Johguchi, Ken Takeuchi (Chuo Univ.)
(19) 15:55-17:55 [Poster Presentation]
Control Gate Length, Spacing and Stacked Layer Number Design for BiCS NAND Flash Memory
Reo Hirasawa, Kousuke Miyaji, Ken Takeuchi (Chuo Univ)
(20) 15:55-17:55 [Poster Presentation]
Evaluation Platform based on Transaction Model Base for 3D Hybrid ReRAM/MLC NAND SSD and Real Data Pattern Analysis
Wataru Toriumi, Kousuke Miyaji, Koh Johguchi, Shogo Hachiya, Ken Takeuchi (Chuo Univ.)
(21) 15:55-17:55 [Poster Presentation]
FPGA Implementation of HOG-based Real-Time Object Detection Processor
Kenta Takagi, Kosuke Mizuno, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.)
(22) 15:55-17:55 [Poster Presentation]
About the system simulation methodology for the switching power converters
Kei Watanabe, Tatsuya Furukawa, Yasuhiro Sugimoto (Chuo Univ.)
(23) 15:55-17:55 [Poster Presentation]
Temperature Dependence of Phase Change Random Access Memory (PRAM)
Toru Egami, Koh Johguchi, Ken Takeuchi (Chuo Univ)
(24) 15:55-17:55 [Poster Presentation]
Single Inductor Dual Output DC-DC Boost converter with Serial Control
Shu Wu, Yasunori Kobori, Mu Rong Li, Zhao Feng, Qulin Zhu, Shaiful Nizam Mohyar (Gunma Univ), Takahiro Odaguchi, Tetsuji Yamaguchi, Isao Nakanishi, Kimio Ueda (AKM Tech.), Jun-ichi Matsuda (AKPD), Nobukazu Takai, Haruo Kobayashi (Gunma Univ)
(25) 15:55-17:55 [Poster Presentation]
Ultra-Low-Voltage Dynamic Amplifier
James Lin, Masaya Miyahara, Akira Matsuzawa (Tokyo Inst. of Tech.)
(26) 15:55-17:55 [Poster Presentation]
A Design of Patch Clamp Measurement System using 0.18μm CMOS Technology
Wataru Nakayama, Ryuich Ohno, Yohei Yasuda, Takuya Kawashima, Nobuhiko Nakano (Keio Univ.)
(27) 15:55-17:55 [Poster Presentation]
A Design of On-Chip Solar Cell and Regulated DC-DC Converter for Microsystem using 0.18μm CMOS Process
Haruki Ono, Daiju Kikuchi, Kazuki Nomura, Nobuhiko Nakano (Keio Univ.)
(28) 15:55-17:55 [Poster Presentation]
A 60-GHz CMOS Direct-Conversion Transceiver
Seitaro Kawai, Ryo Minami, Ahmed Musa, Yuki Tsukui, Yasuaki Takeuchi, Kenichi Okada, Akira Matsuzawa (Titech)
Tue, Dec 18 AM 
09:30 - 10:45
(29) 09:30-09:55 A Hardware-Implementation-Friendly Algorithm Based on Hierarchical Models for Real-Time Human Action Recognition Kazumi Fukuda, Tadashi Shibata (Univ. of Tokyo)
(30) 09:55-10:20 A Stable Chip-ID Generating Physical Uncloneable Function Using Random Address Errors in SRAM Hidehiro Fujiwara, Makoto Yabuuchi, Yasumasa Tsukamoto, Hirofumi Nakano, Toru Owada, Hiroyuki Kawai, Koji Nii (Renesas)
(31) 10:20-10:45 28-nm HKMG GHz Digital Sensor for Detecting Dynamic Voltage Drops in Testing for Peak Power Optimization Mitsuhiko Igarashi, Yoshio Takazawa, Yasuto Igarashi, Hiroaki Matsushita, Kan Takeuchi (Renesas Electronics)
Tue, Dec 18 AM 
10:55 - 12:10
(32) 10:55-11:45 [Invited Talk]
Soft-error evaluation and mitigation technologies
Taiki Uemura (Fujitsu Semiconductor Ltd.)
(33) 11:45-12:10 A 65 nm Low-Power Adaptive-Coupling Redundant Flip-Flop Masaki Masuda, Kanto Kubota, Ryosuke Yamamoto (KIT), Jun Furuta (Kyoto Univ.), Kazutoshi Kobayashi (KIT), Hidetoshi Onodera (Kyoto Univ.)
Tue, Dec 18 PM 
13:30 - 15:35
(34) 13:30-14:20 [Invited Talk]
CMOS analog mixed circuit and its applications
Shouhei Kousai (Toshiba)
(35) 14:20-14:45 High Efficiency 315MHz Transmitter with Dual Supply Voltage Scheme Shunta Iguchi (Univ. of Tokyo), Akira Saito, Kazunori Watanabe (STARC), Takayasu Sakurai, Makoto Takamiya (Univ. of Tokyo)
(36) 14:45-15:10 Single Inductor Multi Output DC-DC Converter Design with Hythterisis Control Tatsunori Nagasima, Yasunori Kobori, Takahiro Sakai, Syunsuke Tanaka (Gunma Univ.), Takahiro Odaguchi, Tetsuji Yamaguchi, Isao Nakanishi, Kimio Ueda (AKM Tech.), Jun-ichi Matsuda (AKPD), Nobukazu Takai, Haruo Kobayashi (Gunma Univ.)
(37) 15:10-15:35 Development of optical response current model of lateral pin photodiode Yosuke Imura, Kiyoshi Ise (SNCT)
Tue, Dec 18 PM 
15:45 - 16:35
(38) 15:45-16:35 [Invited Talk]
Challenges to top-level circuit couference
-- Experiences of former device researcher --
Kousuke Miyaji (Chuo Univ.)

Announcement for Speakers
General TalkEach speech will have 20 minutes for presentation and 5 minutes for discussion.

Contact Address and Latest Schedule Information
ICD Technical Committee on Integrated Circuits and Devices (ICD)   [Latest Schedule]
Contact Address Shin-ichi O'uchi, National Institute of AIST
Tel. +81-29-861-5068, fax. +81-29-861-5170
E--mail: ouaist 


Last modified: 2012-12-03 11:54:50


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