Tue, Feb 21 AM Low Power Testing
10:30 - 11:20 |
| (1) |
10:30-10:55 |
A dynamic test compaction method on low power oriented test generation using capture safe test vectors |
Toshinori Hosokawa, Atsushi Hirai, Hiroshi Yamazaki, Masayuki Arai (Nihon Univ.) |
| (2) |
10:55-11:20 |
IR-Drop Analysis on Different Power Supply Network Designs |
Kohei Miyase, Kiichi Hamasaki (Kyutech), Matthias Sauer (University of Freiburg), Ilia Polian (University of Passau), Bernd Becker (University of Freiburg), Xiaoqing Wen, Seiji kajihara (Kyutech) |
| |
11:20-11:35 |
Break ( 15 min. ) |
Tue, Feb 21 AM Fault Diagnosis
11:35 - 12:25 |
| (3) |
11:35-12:00 |
Built-In Self Diagnosis Architecture for Logic Design |
Keisuke Kagawa, Fumiya Yano, Senling Wang, Yoshinobu Higami, Hiroshi Takahashi (Ehime Univ.), Satoshi Ohtake (Oita Univ.) |
| (4) |
12:00-12:25 |
An Approach to Performance Improvement of Machine Learning Based Fail Chip Discrimination |
Daichi Yuruki, Satoshi Ohtake (Oita Univ), Yoshiyuki Nakamura (Renesas System Design) |
| |
12:25-14:00 |
Break ( 95 min. ) |
Tue, Feb 21 PM
14:00 - 14:50 |
| (5) |
14:00-14:25 |
Impact of Operational Unit Binding on Aging-induced Degradation in High-level Synthesis for Asynchronous Systems |
Tsuyoshi Iwagaki, Kohta Itani, Hideyuki Ichihara, Tomoo Inoue (Hiroshima City Univ.) |
| (6) |
14:25-14:50 |
An Untestable Fault Identification Method for Sequential Circuits Based on SAT Using Unreachable States |
Morito Niseki, Toshinori Hosokawa (Nihon Univ.), Msayoshi Yoshimura (Kyoto Sangyo Univ.), Masayuki Arai (Nihon Univ.), Hiroyuki Yotsuyanagi, Masaki Hashizume (Tokushima Univ.) |
| |
14:50-15:05 |
Break ( 15 min. ) |
Tue, Feb 21 PM
15:05 - 15:55 |
| (7) |
15:05-15:30 |
A Method of Strongly Secure Scan Design Using Extended Shift Registers |
Hiroshi Yamazaki, Toshinori Hosokawa (Nihon Univ), Hideo Fujiwara (Osaka Gakuin Univ) |
| (8) |
15:30-15:55 |
A Study of Message Efficient Avoidance Routing |
Yusuke Sugiura, Tomoya Osuki, Kazuya Sakai, Satoshi Fukumoto (Tokyo Metropolitan Univ.) |
| |
15:55-16:10 |
Break ( 15 min. ) |
Tue, Feb 21 PM
16:10 - 17:00 |
| (9) |
16:10-16:35 |
Considerations on Characteristics of Ring Oscillators Implemented in FPGA |
Kouhei Satou, Yukiya Miura (Tokyo Metropolitan Univ.) |
| (10) |
16:35-17:00 |
Design for Evaluation of TSV based Interconnections in 3D-SIC
-- Interconnection Resistance Evaluation with Analog Boundary Scan -- |
Shuichi Kameyama (Ehime Univ./Fujitsu), Senling Wang, Hiroshi Takahashi (Ehime Univ.) |