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Technical Committee on Silicon Device and Materials (SDM)
Chair: Yasuo Nara (Fujitsu Semiconductor) Vice Chair: Yuzou Oono (Univ. of Tsukuba)
Secretary: Yoshitaka Sasago (Hitachi)
Assistant: Rihito Kuroda (Tohoku Univ.)

===============================================
Technical Committee on Integrated Circuits and Devices (ICD)
Chair: Takeshi Yamamura (Fujitsu Labs.) Vice Chair: Minoru Fujishima (Hiroshima Univ.)
Secretary: Toshimasa Matsuoka (Osaka Univ.), Osamu Watanabe (Toshiba)
Assistant: Shinichi Ouchi (AIST), Takeshi Yoshida (Hiroshima Univ.), Akira Tsuchiya (Kyoto Univ.), Pham Konkuha (Univ. of Electro-Comm.)

DATE:
Thu, Aug 1, 2013 09:00 - 17:10
Fri, Aug 2, 2013 09:00 - 17:20

PLACE:


TOPICS:
Low voltage/low power techniques, novel devices, circuits, and applications

----------------------------------------
Thu, Aug 1 AM (09:00 - 17:10)
----------------------------------------

(1) 09:00 - 09:25
Analysis of Steep Subthreshold Slope Characteristics in SOI MOSFET
Takayuki Mori, Jiro Ida (Kanazawa Inst. of Tech.)

(2) 09:25 - 09:50
Performance Enhancement of Tunnel Field-Effect Transistors by Synthetic Electric Field Effect
Yukinori Morita, Takahiro Mori, Shinji Migita, Wataru Mizubayashi, Akihito Tanabe, Koichi Fukuda, Kazuhiko Endo, Takashi Matsukawa, Shin-ichi O'uchi, Yongxun Liu, Meishoku Masahara, Hiroyuki Ota (AIST)

(3) 09:50 - 10:15
Scaling Strategy for Low Power RF Applications with Multi Gate Oxide Dual Work function (DWF) MOSFETs Utilizing Self-Aligned Integration Scheme
Toshitaka Miyata, Shigeru Kawanaka, Akira Hokazono, Tatsuya Ohguro, Yoshiaki Toyoshima (TOSHIBA)

----- Break ( 10 min. ) -----

(4) 10:25 - 11:10
[Invited Talk]
Future of Integrated Circuit R&D: Grow out from Parts/Component Mind
Kazuya Masu (Tokyo Inst. of Tech.)

(5) 11:10 - 11:55
[Invited Talk]
3D-architecture technology movements and opportunity of Japan
Hiroaki Ikeda (ASET)

----- Lunch ( 65 min. ) -----

(6) 13:00 - 13:45
[Invited Talk]
Tera-Scale Three-Dimensional Integration (3DI) using Bumpless TSV Interconnects
Takayuki Ohba (Tokyo Inst. of Tech.)

(7) 13:45 - 14:30
[Invited Talk]
Design and diagnosis of 100GB/s Wide I/O with 4096b TSVs through Active Silicon Interposer
Makoto Nagata, Satoshi Takaya (Kobe Univ.), Hiroaki Ikeda (ASET)

----- Break ( 10 min. ) -----

(8) 14:40 - 15:25
[Invited Talk]
A 0.15mm-Thick Non-Contact Connector for MIPI Using Vertical Directional Coupler
Atsutake Kosuge, Wataru Mizuhara, Tsunaaki Shidei, Tsutomu Takeya, Noriyuki Miura, Masao Taguchi, Hiroki Ishikuro, Tadahiro Kuroda (Keio Univ.)

----- Break ( 15 min. ) -----

(9) 15:40 - 17:10
[Panel Discussion]
3D Integration: What and when do we expect?
Kazuya Masu (Tokyo Inst. of Tech.), Hiroaki Ikeda (ASET), Makoto Nagata (Kobe Univ), Kenji Takahashi (Toshiba), Takayuki Ohba (Tokyo Inst. of Tech.), Daisuke Suzuki (Pezy Computing)

----------------------------------------
Fri, Aug 2 AM (09:00 - 17:20)
----------------------------------------

(10) 09:00 - 09:25
SRAM Cell Stability Parameter: Noise Margin or Vmin?
Anil Kumar, Takuya Saraya (Univ. of Tokyo), Shinji Miyano (STARC), Toshiro Hiramoto (Univ. of Tokyo)

(11) 09:25 - 09:50
Reduced Cell Current Variability in Fully Depleted Silicon-on-Thin-BOX (SOTB) SRAM Cells at Supply Voltage of 0.4V
Tomoko Mizutani (Univ. of Tokyo), Yoshiki Yamamoto, Hideki Makiyama, Hirofumi Shinohara, Toshiaki Iwamatsu, Hidekazu Oda, Nobuyuki Sugii (LEAP), Toshiro Hiramoto (Univ. of Tokyo)

(12) 09:50 - 10:15
A cost-effective 45nm 6T-SRAM reducing 50mV Vmin and 53% standby leakage with multi-Vt asymmetric halo MOS and write assist circuitry
Koji Nii, Makoto Yabuuchi, Hidehiro Fujiwara, Yasumasa Tsukamoto, Yuichiro Ishii (Renesas Electronics), Tetsuya Matsumura (Nihon Univ.), Yoshio Matsuda (Kanazawa Univ.)

----- Break ( 10 min. ) -----

(13) 10:25 - 10:50
28nm 50% Power-Reducing Contacted Mask Read Only Memory Macro With 0.72ns Read Access Time Using 2T Pair Bitcell and Dynamic Column Source Bias Control Technique
Yukiko Umemoto, Koji Nii, Jiro Ishikawa, Makoto Yabuuchi, Yasumasa Tsukamoto, Shinji Tanaka, Koji Tanaka, Kazutaka Mori, Kazumasa Yanagisawa (Renesas Electronics)

(14) 10:50 - 11:15
A 123uW Standby Power Technique with EM-Tolerant 1.8V I/O NMOS Power Switch in 28nm HKMG Technology
Kazuki Fukuoka, Ryo Mori, Akira Kato, Mitsuhiko Igarashi, Koji Shibutani, Takashi Yamaki, Koji Nii, Sadayuki Morita, Takao Koike (Renesas Electronics), Noriaki Sakamoto (Renesas Mobile)

(15) 11:15 - 12:00
[Invited Talk]
An LDPC Decoder with Time Domain Analog and Digital Mixed Signal Processing
Daisuke Miyashita, Ryo Yamaki (Toshiba), Kazunori Hashiyoshi (Toshiba Microelectronics), Hiroyuki Kobayashi, Shouhei Kousai, Yukihito Oowaki, Yasuo Unekawa (Toshiba)

----- Lunch ( 60 min. ) -----

(16) 13:00 - 13:25
A 0.4-1V SAR ADC Using Wide Range Operation Asynchronous Controller
Yosuke Toyama, Akira Shikata, Kentaro Yoshioka, Ryota Sekimoto, Tadahiro Kuroda, Hiroki Ishikuro (Keio Univ.)

(17) 13:25 - 13:50
A Full Asynchronous Nano-Watt SAR ADC by Boosted Power Gaitng
Ryo Saito, Ryota Sekimoto, Akira Shikata (Keio Univ)

(18) 13:50 - 14:15
Improvement Linearity of the DAC with Unification of the MOSFET's Operating Region
Takumu Yomogita, Cong-Kha Pham (UEC)

----- Break ( 10 min. ) -----

(19) 14:25 - 15:10
[Invited Talk]
A 10th Generation 16-Core SPARC64 Processor for Mission-Critical UNIX Server
Ryuji Kan, Tomohiro Tanaka, Go Sugizaki, Ryuichi Nishiyama, Sota Sakabayashi (Fujitsu), Yoichi Koyanagi (Fujitsu Laboratories), Ryuji Iwatsuki, Kazumi Hayasaka (Fujitsu), Taiki Uemura (Fujitsu Semiconductor), Gaku Itou, Yoshitomo Ozeki, Hiroyuki Adachi, Kazuhiro Furuya, Tsuyoshi Motokurumada (Fujitsu)

(20) 15:10 - 15:55
[Invited Talk]
A single chip LTE capable communication processor R-Mobile U2 and its technologies in power management
-- Clock control method by the power saver --
Masaki Fujigaya, Noriaki Sakamoto, Takao Koike, Takahiro Irita, Kohei Wakahara, Tsugio Matsuyama, Keiji Hasegawa, Toshiharu Saito, Akira Fukuda, Kaname Teranishi (Renesas Mobile Corp.), Kazuki Fukuoka, Noriaki Maeda, Koji Nii (Renesas Electronics Corp.), Takeshi Kataoka, Toshihiro Hattori (Renesas Mobile Corp.)

----- Break ( 10 min. ) -----

(21) 16:05 - 16:30
Input common-mode voltage of the opamp improved wide-area by bulk-control
Mamoru Ohsawa, Cong-Kha Pham (UEC)

(22) 16:30 - 16:55
Affine motion model estimation processor applied to face parts tracking
Shunsuke Morita, Masayuki Miyama, Yoshio Matsuda (Kanazawa Univ.)

(23) 16:55 - 17:20
Intermittent Transmitter Circuit with Novel Feedback Source Follower Amplifier for Solar Powered 5-mm-cubic Wireless Sensor Nodes with 1/20 λ Dipole Antenna
Kenichi Matsunaga, Shoichi Oshima, Hiroki Morimura, Mitsuru Harada (NTT)

# Information for speakers
General Talk will have 20 minutes for presentation and 5 minutes for discussion.

# CONFERENCE SPONSORS:
- This conference is co-sponsored by IEEE SSCS Japan/Kansai Chapter.


=== Technical Committee on Silicon Device and Materials (SDM) ===
# FUTURE SCHEDULE:

Thu, Oct 17, 2013 - Fri, Oct 18, 2013: Niche, Tohoku Univ. [Fri, Aug 16], Topics: Process Science and New Process Technology
Thu, Nov 14, 2013 - Fri, Nov 15, 2013: Kikai-Shinko-Kaikan Bldg. [Mon, Sep 9], Topics: Process, Device, Circuit Simulations, etc.

# SECRETARY:
Yukinori Ono(NTT)
Tel 046-240-2641 Fax 046-240-4317
E-mail: ono.yukinori@lab.ntt.co.jp

=== Technical Committee on Integrated Circuits and Devices (ICD) ===
# FUTURE SCHEDULE:

Wed, Aug 28, 2013 - Fri, Aug 30, 2013: Hotel Akane , Topics: Analog RF
Thu, Sep 5, 2013 - Fri, Sep 6, 2013: [unfixed]
Mon, Oct 7, 2013 - Tue, Oct 8, 2013: [Fri, Aug 16]
Fri, Nov 15, 2013 - Sat, Nov 16, 2013: Ho Chi Minh City (Vietnam) [Sat, Aug 10], Topics: The 4th IEICE International Conference on Integrated Circuits Design and Verification (ICDV2013)
Mon, Nov 18, 2013: Tokyo Institute of Technology , Topics: Analog RF
Wed, Nov 27, 2013 - Fri, Nov 29, 2013: [Tue, Sep 17], Topics: Design Gaia 2013 -New Field of VLSI Design-

# SECRETARY:
Toshimasa Matsuoka (Osaka University)
TEL 06-6879-7792,FAX 06-6879-7792
E-mail:matsuoka@eei.eng.osaka-u.ac.jp


Last modified: 2013-07-08 13:57:22


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