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=============================================== Technical Committee on Integrated Circuits and Devices (ICD) Chair: Masao Nakaya Vice Chair: Akira Matsuzawa Secretary: Shinji Miyano, Koji Kai Assistant: Yoshiharu Aimoto, Makoto Nagata =============================================== Technical Committee on Signal Processing (SIP) Chair: Kenji Nakayama Vice Chair: Ichiro Kuroda, Hitoshi Kiya Secretary: Eisuke Horita, Osamu Houshuyama =============================================== Technical Committee on Image Engineering (IE) Chair: Kiyoharu Aizawa Vice Chair: Yoshiyuki Yashima, Toshiaki Fujii Secretary: Hirohisa Jozawa, Shin-ichi Sakaida Assistant: Akira Utsumi, Akio Yoneyama =============================================== Special Interest Group on System and LSI Design Methodology (IPSJ-SLDM) DATE: Thu, Oct 20, 2005 09:00 - 17:10 Fri, Oct 21, 2005 09:00 - 16:30 PLACE: Ichinobo, Sakunami Spa(Sakunami-Onsen, Aoba-ku, Sendai-shi, 989-3431 Japan.http://www.ichinobo.com/sakunami/top.html. Prof. Masanori Hariyama. 022-395-2131) TOPICS: Processor, DSP, Image Engineering and etc. ---------------------------------------- Thu, Oct 20 AM (09:00 - 10:40) ---------------------------------------- (1) 09:00 - 09:20 Measuring 3D Position Using Picture Angle Jumpei Akabane, Kenji Ohmori (Hosei Univ.) (2) 09:20 - 09:40 A Study of Ray-Space Coding Using a Hybrid Disparity Compensation DCT Codec Kenji Yamamoto, Tomohiro Yendo, Toshiaki Fujii, Masayuki Tanimoto (Nagoya Univ.) (3) 09:40 - 10:00 Temporal Segmentation of 3D Videos Based on Numerical Features Toshihiko Yamasaki, Kiyoharu Aizawa (Univ. of Tokyo) (4) 10:00 - 10:20 Detection of Ringing Distortion in Encoded Image by Wavelet Transform Asako Toshihiro, Masashi Kameda (Iwate Prefectural Univ.) (5) 10:20 - 10:40 Studies of the Shoeprint Coding Based on the Ridgelet-Hough Transform -- A Proposition of Coding and Comparisons with the Conventional Method -- Makoto Hasegawa, Kazumoto Tanaka, Seiji Ishihara, Byon-chol So, Masakazu Kanezashi (Kinki Univ.), Hiroshi Moriwaki (Hiroshima Information Symphony) ---------------------------------------- Thu, Oct 20 AM (10:50 - 12:10) ---------------------------------------- (6) 10:50 - 11:10 Analysis of low frequency component of signal by Generalized Harmonic Analysis (GHA) Ichiyoh Maehara, Yoshihiro Kanda, Teruo Muraoka (Mi-TECH) (7) 11:10 - 11:30 A Learning Algorithm Reducing Signal Distortion for Frequency Domain Feedforward Blind Source Separation Yasuhiro Dejima, Akihide Horita, Kenji Nakayama, Akihiro Hirano (Kanazawa Univ.) (8) 11:30 - 11:50 An Ultra-low Complexity Motion Estimation Algorithm and its Implementation of Specific Processor Seiichiro Hiratsuka (Fukuoka IST), Satoshi Goto, Takeshi Ikenaga (Waseda Univ.) (9) 11:50 - 12:10 High-Quality Background Sprite Generation Based on Phase-Only Correlation Norihito Numa, Takafumi Aoki (Tohoku Univ.), Satoshi Kondo (Matsushita Electric Industrial Co., Ltd.) ---------------------------------------- Thu, Oct 20 PM (13:00 - 14:20) ---------------------------------------- (10) 13:00 - 13:20 A 2.0μm Pixel Pitch MOS Image Sensor with an Amorphous Si Film Color Filter Masahiro Kasano, Yuichi Inaba, Mitsuyoshi Mori, Shigetaka Kasuga, Takahiko Murata, Takumi Yamaguchi (MEI) (11) 13:20 - 13:40 Four-Pixel accuracy Motion Estimation Unit using Extended Templates for HDTV Encording Jin Kobayashi, Takahiro Hiramatsu, Takahiro Sasaki, Toshio Kondo (Mie Univ) (12) 13:40 - 14:00 A low power H.264 motion estimation algorithm for mobile video applications Masaki Hamamoto, Kenichi Nagai (Kobe Univ.), Tetsuro Matsuno (Kanazawa Univ.), Yuichiro Murachi, Junichi Miyakoshi (Kobe Univ.), Masayuki Miyama (Kanazawa Univ.), Masahiko Yoshimoto (Kobe Univ.) (13) 14:00 - 14:20 A Ray-Tracing Engine for Dynamic Scene Rendering Yoshiyuki Kaeriyama, Kenichi Suzuki, Tadao Nakamura (Tohoku Univ.) ---------------------------------------- Thu, Oct 20 PM (14:30 - 15:15) ---------------------------------------- (14) 14:30 - 15:15 [Invited Talk] A Psychologically-Inspired VLSI Brain Model System for Human-Like Image Recognition Tadashi Shibata (Univ. of Tokyo) ---------------------------------------- Thu, Oct 20 PM (15:30 - 17:10) ---------------------------------------- (15) 15:30 - 15:50 A Memory Controller that Reduces Latency of Cached SDRAM Seiji Miura, Satoru Akiyama (Hitachi,Ltd) (16) 15:50 - 16:10 DFT Technique for Memory Macro with Built-in ECC Keiichi Kushida, Nobuaki Otsuka, Osamu Hirabayashi, Yasuhisa Takeyama (Toshiba Co.) (17) 16:10 - 16:30 A Soft-Error-Immune TCAM Archiecture with Associated Embedded DRAM Yuji Yano, Hideyuki Noda, Katsumi Dosaka, Fukashi Morishita, Kazunari Inoue, Toshiyuki Ogawa, Kazutami Arimoto (Renesas) (18) 16:30 - 16:50 A Capacitorless Twin-Transistor Random Access Memory (TTRAM) on SOI Takayuki Gyohten, Fukashi Morishita, Hideyuki Noda (Renesas Technology Corp.), Mako Okamoto (Daioh Electric Corp.), Takashi Ipposhi, Shigeto Maegawa, Katsumi Dosaka, Kazutami Arimoto (Renesas Technology Corp.) (19) 16:50 - 17:10 A 333MHz Random Cycle DRAM Using the Floating Body Cell Kosuke Hatsuda, Katsuyuki Fujita, Takashi Ohsawa (Toshiba Corp.) ---------------------------------------- Fri, Oct 21 AM (09:00 - 10:00) ---------------------------------------- (20) 09:00 - 09:20 A Phase Noise Minimization of CMOS LC-VCOs Over Wide Tuning Range and Large PVT Variations Daisuke Miyashita, Hiroki Ishikuro, Shouhei Kousai, Hiroyuki Kobayashi, Hideaki Majima, Kenichi Agawa, Mototsugu Hamada (Toshiba Corp.) (21) 09:20 - 09:40 Substrate Noise Reduction and Random Variability Neutralization with Self Adjusted Forward Body Bias Control Yoshihide Komatsu, Koichiro Ishibashi, Toshiro Tsukada, Masaharu Yamamoto (STARC), Kenji Shimazaki, Mitsuya Fukazawa, Makoto Nagata (Kobe Univ.) (22) 09:40 - 10:00 Thermal Analysis on Microprocessors Naoyuki Hasegawa, Mutsuo Ito, Ryusuke Egawa, Kenichi Suzuki, Tadao Nakamura (Tohoku Univ.) ---------------------------------------- Fri, Oct 21 AM (10:10 - 11:10) ---------------------------------------- (23) 10:10 - 10:30 Development of an embedded processor core SH-X2 Takashi Okada (Hitachi), Tomoichi Hayashi, Takehiro Shimizu (Renesas), Fumio Arakawa, Tetsuya Yamada (Hitachi), Osamu Nishii, Toshihiro Hattori (Renesas) (24) 10:30 - 10:50 Single-Chip Multi-Processor Integrating Quadruple 8-Way VLIW Processors Atsushi Tanaka, Atsuhiro Suga, Fumihiko Hayakawa, Shinichiro Tago, Satoshi Imai (Fujitsu Lab) (25) 10:50 - 11:10 Compaction of Arithmetic Unit with Bit-Level-Parallelism Jubee Tada (Yamagata Univ.), Ryusuke Egawa (Tohoku Univ.), Gensuke Goto (Yamagata Univ.), Tadao Nakamura (Tohoku Univ.) ---------------------------------------- Fri, Oct 21 AM (11:20 - 12:05) ---------------------------------------- (26) 11:20 - 12:05 [Invited Talk] Development of Image Recognition Processor Based on Configurable Processor Takashi Miyamori (Toshiba) ---------------------------------------- Fri, Oct 21 PM (13:00 - 13:45) ---------------------------------------- (27) 13:00 - 13:45 [Invited Talk] Technology for Embedded Processors Kunio Uchiyama (Hitachi) ---------------------------------------- Fri, Oct 21 PM (14:00 - 15:20) ---------------------------------------- (28) 14:00 - 14:20 A Reliability Evaluation Technique for Soft-Error Susceptible Computer Systems Makoto Sugihara (ISIT), Tohru Ishihara (Kyushu Univ.), Koji Hashimoto (Fukuoka Univ.), Masanori Muroyama (Kyushu Univ.) (29) 14:20 - 14:40 A study for hardware optimization using a high level synthesis fron C Satoru Inoue, Tsuyoshi Kondo, Tomonori Izumi, Masahiro Fukui (Rits) (30) 14:40 - 15:00 A Cache-Defect-Aware Code Placement Technique for Improving the Performance of Processor Tohru Ishihara (Kyushu Univ.), Farzan Fallah (FLA) (31) 15:00 - 15:20 A study for power and speed tradeoff estimation for behavior hardware model Noriyuki Inoue, Katsuhiro Oshikawa, Tomonori Izumi, Masahiro Fukui (Rits Univ.) ---------------------------------------- Fri, Oct 21 PM (15:30 - 16:30) ---------------------------------------- (32) 15:30 - 15:50 A Monitor Generation Method for Formal Monitor-based Verification Considering Input Constraints Yosuke Kakiuchi (Osaka Univ.), Akira Kitajima (Osaka Electro-Communication Univ.), Kiyoharu Hamaguchi, Toshinobu Kashiwabara (Osaka Univ.) (33) 15:50 - 16:10 A cell library development methodology for character projection Makoto Sugihara (ISIT), Taiga Takata, Kenta Nakamura (Kyushu Univ.), Ryoichi Inanami (e-BEAM), Hiroaki Hayashi (Tokyo Electron), Katsumi Kishimoto (e-BEAM), Tetsuya Hasebe (Tokyo Electron), Yukihiro Kawano (e-BEAM), Yusuke Matsunaga, Kazuaki Murakami (Kyushu Univ.), Katsuya Okumura (Univ. of Tokyo) (34) 16:10 - 16:30 A Study for Power Grid Optimization Taiki Harada, Kenji Kusano, Takayuki Shimada, Hironobu Ishijima, Masahiro Fukui (Rits Univ.) === Technical Committee on Integrated Circuits and Devices (ICD) === # FUTURE SCHEDULE: Wed, Nov 30, 2005 - Fri, Dec 2, 2005: Kitakyushu International Conference Center [Fri, Sep 16], Topics: Design/Verification/Test of VLSI systems, etc. Thu, Dec 15, 2005 - Fri, Dec 16, 2005: [Thu, Oct 27] Thu, Jan 26, 2006 - Fri, Jan 27, 2006: Kikai-Shinko-Kaikan Bldg. [Fri, Nov 18] # SECRETARY: Shinji Miyano (Toshiba) TEL +81-44-548-2696, FAX +81-44-548-8324 E-mail:  n       ba === Technical Committee on Signal Processing (SIP) === # FUTURE SCHEDULE: Nov, 2005: Recess Dec, 2005: Recess Thu, Jan 26, 2006 - Fri, Jan 27, 2006: Kyusyu Univ. [Thu, Nov 10], Topics: Broadband Wireless Access, Radio Communication, Signal Processing # SECRETARY: Eisuke Horita (Kanazawa Univ.) TEL +81-76-234-4840, FAX +81-76-234-4870 E-mail:    t    -u === Technical Committee on Image Engineering (IE) === # FUTURE SCHEDULE: Thu, Nov 24, 2005 - Fri, Nov 25, 2005: [Tue, Sep 20] Mon, Dec 12, 2005 - Tue, Dec 13, 2005: Nagoya Univ. (Video Conf.) [Mon, Oct 17], Topics: Image coding, Communications, Stream technologies, etc. # SECRETARY: Hirohisa Jozawa(NTT Resonant Inc.) TEL 0422-59-5850, FAX 0422-59-1144 E-mail: h jo r, ie-n2005  === Special Interest Group on System and LSI Design Methodology (IPSJ-SLDM) === # FUTURE SCHEDULE: Wed, Nov 30, 2005 - Fri, Dec 2, 2005: Kitakyushu International Conference Center [Fri, Sep 16], Topics: Design/Verification/Test of VLSI systems, etc. Tue, Jan 17, 2006 - Wed, Jan 18, 2006: [Tue, Nov 15], Topics: FPGA and its Application, etc. Last modified: 2005-09-09 22:04:29 |
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